Electronic Components Datasheet Search
  English  ▼

X  

LTM4657 Datasheet(PDF) 13 Page - Analog Devices

Part # LTM4657
Description  20VIN, Dual 5A or Single 10A Step-Down DC/DC 關Module Regulator
PDF  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM4657 Datasheet(HTML) 13 Page - Analog Devices

Back Button LTM4657 Datasheet HTML 9Page - Analog Devices LTM4657 Datasheet HTML 10Page - Analog Devices LTM4657 Datasheet HTML 11Page - Analog Devices LTM4657 Datasheet HTML 12Page - Analog Devices LTM4657 Datasheet HTML 13Page - Analog Devices LTM4657 Datasheet HTML 14Page - Analog Devices LTM4657 Datasheet HTML 15Page - Analog Devices LTM4657 Datasheet HTML 16Page - Analog Devices LTM4657 Datasheet HTML 17Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 13 / 24 page
background image
LTM4705
13
Rev. 0
For more information www.analog.com
APPLICATIONS INFORMATION
or dynamic VOUT changes, the LTM4705’s PGOOD falling
edge includes a blanking delay of approximately 40μs.
Stability compensation
The LTM4705 module internal compensation loop is
designed and optimized for low ESR ceramic output
capacitors only applications. Please note that for appli-
cations that need to achieve high bandwidth control loop
compensation with enough phase margin, a feed forward
capacitor between 33pF – 100pF is recommended from
VOUT to VFB pin. Table 8 is provided for most application
requirements. The LTpowerCAD Design Tool is available
to download online for control loop optimization.
RUN Enable
Pulling the RUN pin to ground forces the LTM4705 into
its shutdown state, turning off both power MOSFETs and
most of its internal control circuitry. Tying the RUN pin
voltage above 1.27V will turn on the entire chip.
Pre-Biased Output Start-Up
There may be situations that require the power supply to
start up with a pre-bias on the output capacitors. In this
case, it is desirable to start up without discharging that
output pre-bias. The LTM4705 can safely power up into
a pre-biased output without discharging it.
The LTM4705 accomplishes this by forcing discontinu-
ous mode (DCM) operation until the TRACK/SS pin volt-
age reaches 0.6V reference voltage. This will prevent the
bottom MOSFET from turning on during the pre-biased
output start-up which would discharge the output.
Overtemperature Protection
The internal overtemperature protection monitors the
junction temperature of the module. If the junction
temperature reaches approximately 160°C, both power
switches will be turned off until the temperature drops
about 15°C cooler.
Input Overvoltage Protection
In order to protect the internal power MOSFET devices
against transient voltage spikes, the LTM4705 constantly
monitors each VIN pin for an overvoltage condition. When
VIN rises above 22.5V, the regulator suspends operation
by shutting off both power MOSFETs on the correspond-
ing channel. Once VIN drops below 21.5V, the regulator
immediately resumes normal operation. The regulator
executes its soft-start function when exiting an overvolt-
age condition.
Thermal Considerations and Output Current Derating
The thermal resistances reported in the Pin Configuration
section of the data sheet are consistent with those param-
eters defined by JESD51-9 and are intended for use with
finite element analysis (FEA) software modeling tools that
leverage the outcome of thermal modeling, simulation,
and correlation to hardware evaluation performed on a
µModule package mounted to a hardware test board—
also defined by JESD51-9 (“Test Boards for Area Array
Surface Mount Package Thermal Measurements”). The
motivation for providing these thermal coefficients in
found in JESD51-12 (“Guidelines for Reporting and Using
Electronic Package Thermal Information”).
Many designers may opt to use laboratory equipment and
a test vehicle such as the demo board to anticipate the
µModule regulator’s thermal performance in their appli-
cation at various electrical and environmental operating
conditions to compliment any FEA activities. Without
FEA software, the thermal resistances reported in the
Pin Configuration section are in and of themselves not
relevant to providing guidance of thermal performance;
instead, the derating curves provided in the data sheet can
be used in a manner that yields insight and guidance per-
taining to one’s application usage, and can be adapted to
correlate thermal performance to one’s own application.
The Pin Configuration section typically gives four thermal
coefficients explicitly defined in JESD 51-12; these coef-
ficients are quoted or paraphrased below:
1. θJA, the thermal resistance from junction to ambient,
is the natural convection junction-to-ambient air ther-
mal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to
as “still air” although natural convection causes the
air to move. This value is determined with the part



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com