MIC9130 datasheet(10/19 Pages) MICREL

10 / 19 page

MIC9130

Micrel, Inc.

M9999-040805

April 2005

Start-up circuit operation is illustrated in Figure 2. VIN is ap-

plied and the depletion FET, which is normally enabled allows

current from VIN to charge the VCC bias capacitor. Once the

VCC voltage reaches the VCC enable threshold, VGLO(ON) ,

the gate drive is enabled and the MIC9130 starts switching.

VCC continues to increase until the Pre-Regulator turn-off

threshold, (VPR(OFF)), is reached and the depletion FET is

turned off. The VCC voltage decreases as energy from the

bias capacitor is used to supply the controller. The deple-

tion FET is turned back on when the pre-regulator turn-on

threshold is reached. A bias winding derived supply voltage,

set higher than the FET turn-off threshold, VPR(OFF), raises

the VCC voltage over the threshold and prevents the FET

from turning on.

In certain designs the MIC9130 may be powered directly from

the Line voltage, eliminating the need for an extra transformer

bias winding. When operating in this fashion the designer

must insure the power dissipation in the IC does not cause

the die temperature to exceed the 125°C maximum. Power

dissipation is calculated by:

DISS

VCC

−

(

)×

Where :

VIN is the line input voltage

VCC is the average VCC voltage (typically 8.5V)

IVCC is the total current drawn by the IC

IVCC is the sum of the operating current of the MIC9130 at

a given frequency and the average current required to drive

the external switching MOSFET. A plot of typical operating

current vs. frequency is given in Figure 3. The average MOS-

FET gate drive current is calculated in the “MOSFET GATE

DRIVE” section of this speciﬁcation.

200

400

600

800 1000

GATE DRIVE FREQUENCY (kHz)

Quiescent Current

vs. Frequency

Ct = 120pF

Ct = 470pF

Figure 3

The die junction temperature is calculated by

T T P

DISS

× θ

Where: TJ is the die junction temperature

TA is the ambient temperature of the circuit

θJA is the junction to ambient thermal resistance

of the MIC9130 (listed in the operating ratings

section of the speciﬁcation.

When powered directly from the Line voltage, the VCC volt-

age will vary between the upper and lower pre-regulator

thresholds. The amplitude of the output gate drive voltage

will vary with the VCC voltage. This should not be a problem

for most topologies since the variation is small (equal to the

ΔVPR hysteresis). The bias regulator in the MIC9130 buffers

the internal circuits from VCC variations.

The pre-regulator FET is protected by a thermal shutdown

circuit, which turns the MOSFEToff if its temperature exceeds

approximately 150 degrees C.

When operating at input voltages greater than 150V, a fast

input voltage risetime during turn-on (which may occur during

a hot plug operation) may cause a high peak current to ﬂow

through the depletion FET, damaging the MIC9130. A 1.8kΩ

resistor in series between the input voltage and the line pin

(pin 1) is recommended when operating at input voltages

greater than 150V. This resistor limits the maximum peak

current to 100mA (at 180VIN) and protects the part.

The depletion mode MOSFET contains an internal parasitic

diode. The VIN pin voltage must be greater than the VCC

voltage or the VCC voltage will be clamped to a diode drop

greater than the VIN voltage. Excessive power dissipation in

the parasitic diode will destroy the IC.

VCC and Bias Supplies

The power for the controller and gate drive circuitry is sup-

plied through the VCC pin. The gate drive current is returned

to ground through the power ground pin (PGND). The rest of

the supply current is returned to ground through the analog

ground pin (AGND). The two ground pins must be connected

together through the PCB ground plane.

High frequency decoupling is provided at the VCC pin to sup-

ply the gate drive’s peak current requirements. Turn-on of the

external MOSFET causes a voltage glitch on the VCC pin. If

the glitch is excessive, this disruption can appear as noise or

jitter in the oscillator circuit or the gate drive waveform. The

decoupling capacitor must be able to supply the MOSFET

gate with the charge required to turn it on. A 0.1µF ceramic

capacitor is usually sufﬁcient for most MOSFETs. Larger

FETs, with a higher gate charge requirement may require a

0.22µF ceramic capacitor or a ceramic capacitor paralleled

with a 2.2µF tantalum or 4.7uF aluminum electrolytic. It is

recommend that if VLINE is greater than 150V DC than the

maximum capacitor recommended on VCC is 2.2µF.The ca-

pacitor must be located next to the VCC pin of the MIC9130.

The ground end of the capacitor should be connected to the

ground plane, making a low impedance connection to the

power ground pin (pin 15).

The internal bias regulator block provides several internal and

external bias voltages. Referring to Figure 1, a 2.5V refer-

ence is used for the internal error ampliﬁer, a 0.82V bias is

used by the current limit comparator and a 1.21V reference

is used by the Line UVLO circuit. An external 5V bias volt-

age (VBIAS) powers the oscillator circuit and may be used

as a reference voltage for other external components. The

VBIAS pin requires a minimum 0.1µf capacitor to ground for

decoupling.

Enable and Undervoltage Monitoring circuits

The two undervoltage lockout circuits in the MIC9130 are

shown in Figure 4. One monitors the VCC voltage and the

other monitors the input line voltage. These signals are OR’d

together and either one can disable the gate drive pin and

discharge the voltage on the soft start capacitor.

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