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9.2.2 Application Curve: Adjusting Output Reset Delay on TLV840EVM

These application curves are taken with the TLV840EVM and they display a change in reset delay time with

different capacitor values. The output reset delay time was designed with the ease of programability for the

customer. Figure 9-3 displays an output reset delay time of 57.6 μs with no capacitor on the CT pin. Figure 9-4

and Figure 9-5 have output reset delay times of 5.42 ms and 56.8 ms, respectively. Both the output delay times

and capacitors used resulted in an order of magnitude difference. Please see the TLV840EVM User Guide for

more information.

VDD

RESET

Reset Delay (tD)= 57.6 µs

Figure 9-3. TLV840EVM RESET Time Delay (tD) with

No Capacitor

VDD

RESET

Reset Delay (tD)= 5.42 ms

Figure 9-4. TLV840EVM RESET Time Delay (tD) with

0.01-µF Capacitor

VDD

RESET

Reset Delay (tD)= 56.8 ms

Figure 9-5. TLV840EVM RESET Time Delay (tD) with 0.1-µF Capacitor

TLV840-Q1

SNVSBY3A – NOVEMBER 2020 – REVISED APRIL 2021

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TLV840 Datasheet(PDF) 20 Page - Texas Instruments