AS3956 datasheet(61/107 Pages) AMSCO

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ams Datasheet

Page 61

[v1-11] 2018-Nov-14

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AS3956 − Detailed Description

Figure 57:

SPI Communication: Writing a Single Register

Figure 58:

SPI Communication: Writing Register Data with Auto-Incrementing Address

Reading Data from Addressable Registers

(Register Read Mode)

After the SPI operation mode bits, the register address to be

read shall be provided, MSB first. Then one or more data bytes

are transferred to MISO output, always MSB first. As in case of

the write mode, also the read mode supports

auto-incrementing addressing.

MOSI is sampled at the falling SCLK edge (as shown in the

following diagrams); data to be read from AS3956 internal

sampled by the master at the falling SCLK edge.

In case the register on defined address does not exist, all 0 data

is sent to MISO. In the following figure an example of reading

of a single byte is given.

SCLK raising

edge Data is

transfered

from µC

SCLK falling

edge Data is

sampled

Data is moved to

Address

A4-A0

/SS rising

edge signals

end of WRITE

Mode

Three

leading bits

indicate Mode

/SS

SCLK

MOSI

00 0

Data is moved to

Address

<A4-A0> + n

/SS rising edge

signals end of

WRITE Mode

Three

leading bits

indicate Mode

Data is moved to

Address

<A4-A0> + (n-1)

Data is moved

to Address

<A4-A0> + 1

Data is

moved to

Address

<A4-A0>

/SS

SCLK

MOSI

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