AS3956 datasheet(84/107 Pages) AMSCO

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[v1-11] 2018-Nov-14

AS3956 − Register Description

IO Configuration Register

Figure 84:

IO Configuration Register

Note(s):

1. Default value is loaded from EEPROM configuration word bits (FAB_CFG2). This register values are stored in registers that are supplied

always when there is VDD_IO or RF present regardless to the BSS line status.

IC Configuration Registers

Figure 85:

IC Configuration Register 0

Note(s):

1. Default value is loaded from EEPROM configuration block bits (IC_CFG0).

Address 00h: IO Configuration

Bit

Name

Default

Function

Type

i2c_pu

1: Enable pull-ups for SDA and SCL when I²C is used

miso_pd1

1: Pull down on MISO when \SS is high

Do not change from default

Address 01h: IC Configuration 0

Bit

Name

Default

Function

Type

7slnt_mod

See note

1: Enable silent mode

6slnt_vl<2>

Silent mode voltage level (see Silent Mode)RO/RW

5slnt_vl<1>

4slnt_vl<0>

3arbit_mod

i2c_addr3<2>

I²C slave address

i2c_addr2<1>

i2c_addr1<0>

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