DMA2286 datasheet(35/48 Pages) MICRONAS

35 / 48 page

DMA 2275, DMA 2286

Pins 38 and 63 – Supply Voltage

These pins must be connected to the positive supply

voltage.

Pins 39 to 46 – Baseband B7 to B0 Input (Fig. 9–4)

Via these pins,the DMA 2275/2286 receives the digi-

tized baseband signal coming either from the VCU 2133

Video Codec in a 7–bit parallel Gray code or from any

other A/D converter in 8–bit parallel binary code.

Pin 47 – IM Bus Busy Output (Fig. 9–11)

This pin supplies a signal which indicates that the IM bus

interface of the DMA 2275/2286 is busy. As long as this

pin delivers a High level signal there should be no IM bus

transfer to or from the DMA 2275/2286.

Pin 49 – Acq. RAM Column Address Select Output (Fig.

9–10)

This pin supplies the Column Address select signal

(CAS) to the external acquisition RAM.

Pin 50 – Acq. RAM Data Input/Output (Fig. 9–8)

Pin 50 serves as output for writing data into the external

acquisition RAM and as input for reading data from that

RAM.

Pins 51 to 55 and 58 to 60 – Acq. RAM Address A0 to A7

Output (Fig. 9–10)

These pins are used for addressing the external acquisi-

tion RAM.

Pin 56 – Acq. RAM Read/Write Output (Fig. 9–10)

By means of this output the external acquisition RAM is

switched to the read or write mode as required.

Pin 57 – Acq. RAM Row Address Select Output (Fig.

9–10)

This pin supplies the Row Address Select signal (RAS)

to the external acquisition RAM.

Pin 64 – S Bus Ident Input (Fig. 9–3)

Via this input, the DMA 2286 receives the ident signal of

the serial 3–line S bus from the DMA 2281.

Pin 65 – Audio Clock Input (Fig. 9–5)

By means of this input, the DMA 2286 receives the re-

quired audio clock signal of 18.432 MHz from the DMA

2281.

Pin 66 – S Bus Data Output (Fig. 9–9)

This pin supplies the digital sound signal to the AMU

2481 Audio Mixer and can be connected to the S Bus

Data output of the DMA 2281. Only one S Bus Data out-

put should be activated for one S Bus sound channel.

Pin 68 – Sound RAM Column Address Select Output

(Fig. 9–11)

This pin supplies the Column Address Select signal

(CAS) to the external sound RAM.

9.5. Pin Circuits

The following figures schematically show the circuitry at

the various pins. The integrated protection structures

are not shown. The letter “P” means P–channel, the let-

ter “N” N–channel.

VSUP

GND

Fig. 9–3:

Input Pins 12, 13, 17, 19,

22 and 64

VSUP

GND

BIAS

Fig. 9–4:

Input Pins 39 to 46

GND

VSUP

Fig. 9–5:

Input Pins16 and 65

VSUP

GND

Fig. 9–6:

Input Pin 15

VSUP

Fig. 9–7:

Input/Output Pin 14

GND

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