Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

DMA2286 Datasheet(PDF) 14 Page - Micronas

Part # DMA2286
Description  DMA 2275, DMA 2286 C/D/D2-MAC Descrambler
PDF  48 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MICRONAS [Micronas]
Direct Link  http://www.micronas.com
Logo MICRONAS - Micronas

DMA2286 Datasheet(HTML) 14 Page - Micronas

Back Button DMA2286 Datasheet HTML 10Page - Micronas DMA2286 Datasheet HTML 11Page - Micronas DMA2286 Datasheet HTML 12Page - Micronas DMA2286 Datasheet HTML 13Page - Micronas DMA2286 Datasheet HTML 14Page - Micronas DMA2286 Datasheet HTML 15Page - Micronas DMA2286 Datasheet HTML 16Page - Micronas DMA2286 Datasheet HTML 17Page - Micronas DMA2286 Datasheet HTML 18Page - Micronas Next Button
Zoom Inzoom in Zoom Outzoom out
 14 / 48 page
background image
DMA 2275, DMA 2286
14
Table 8–1: Data transfer between CCU and DMA 2275/2286
Addr.
No.
Bit
No.
Direct.
MSB
15
14
13
12
11
10
9876
543
2
1
0
LSB
5
6
7
8
9
10
203
194
195
196
197
198
204
205
206
208
209
210
W
W
W
R/W
R
W
W
W
W
W
W
W
W
W
R
R
R
R
0
000
0
EXA
Extension Address
0
000
0
WRA
Write Address
0
000
0
RDA
Read Address
this is an 8 bit register
this is an 8 bit register
0
DAT
Data
00
0
0
0
EXD
Extension Data
BUS
Busy
RRQ
Read
Request
WRQ
Write
Request
0
TT15
0
TT14
0
TT13
0
TT12
0
TT11
0
TT10
0
TT9
0
TT8
0
TT7
0
TT6
0
TT5
0
TT4
0
TT3
0
TT2
0
TT1
0
TT0
S
C1M
Channel Mode
HQ
H
L
0
C1U
Mode
Update
0
C1E
Channel
Enable
0
C1A
Channel Packet Address
S
C2M
Channel Mode
HQ
H
L
0
C2U
Mode
Update
0
C2E
Channel
Enable
0
C2A
Channel Packet Address
S
C3M
Channel Mode
HQ
H
L
0
C3U
Mode
Update
1
C3E
Channel
Enable
82
C3A
Channel Packet Address
S
C4M
Channel Mode
HQ
H
L
0
C4U
Mode
Update
0
C4E
Channel
Enable
0
C4A
Channel Packet Address
106
SFS
Subframe Select
1
DRS
Data
Rate
Select
0
AUM
Auto
Mode
1
CD
Chip
Defin.
00
0
0
0
0
0
0
00
00
0
0
0
0
0
CS
Chip
Select
0
DSB
Disable
S Bus
0
P0C
P0
Clear
0
P0R
P0
Reset
0
DGT
Data Group Type
12
SBE
S Bus Enable
0
TT15
0
TT14
0
TT13
0
TT12
0
TT11
0
TT10
0
TT9
0
TT8
0
TT7
0
TT6
0
TT5
0
TT4
0
TT3
0
TT2
0
TT1
0
TT0
0
C3S
Status
0
C4S
0
P0S
0
C2S
0
C1S
00
0
BER
Bit Error Rate
S
C4L
Coding Law CH4
HQ
H
L
S
C3L
Coding Law CH3
HQ
H
L
S
C2L
Coding Law CH2
HQ
H
L
S
C1L
Coding Law CH1
HQ
H
L
PSH
Packet 0 Syndrom High Byte
PSL
Packet 0 Syndrom Low Byte
PDH
Packet 0 Data High Byte
PDL
Packet 0 Data Low Byte
Bit must be set to zero for write registers (W) and are
don’t care for read registers (R)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com