DMA2286 datasheet(8/48 Pages) MICRONAS

8 / 48 page

DMA 2275, DMA 2286

5. Line 625 Processor

The line 625 processor is loaded via the data burst input.

Line 625 is identified by checking the sync pulse of the

data burst input. The normal sync pulse covers only 6

bits of the line synchronization word (LSW), the sync

pulse of line 625 covers 102 bits of the frame synchroni-

zation data (FSD) and is directly followed by:

–

5 bit

–

71 bit

– 470 bit

UDT

SDF

RDF

unified data time

static data frame

repeated data frame

546 bit

line 625 data

In case of C–MAC or D–MAC the 546 bits of UDT, SDF

and RDF are interleaved with PRBS data. The PRBS

data are discarded by using a clock divider so that the

clock frequency for the line 625 processor is unique for

C–, D– and D2–MAC (10.125 MHz). UDT, SDF and the

error corrected TDMCTL data are stored into the exter-

nal acquisition DRAM (see figure “Line 625 Buffer”) and

are updated every frame.

The line 625 processor consists of:

– Majority Decision

– BCH Check

– Frame Counter Flywheel

– RTCI Detector

5.1. Majority Decision

The RDF consists of five successive identical 94 bit data

blocks transmitting time division multiplex control

(TDMCTL) information. The fivefold repetition is used by

a 3 of 5 majority decision including the BCH suffix.

5.2. BCH Check

SDF and TDMCTL are each protected by a 14 bit BCH

suffix. The BCH check is only used for error detection.

BCH check for the TDMCTL is done after majority deci-

sion. The complete SDF (71 bit) or TDMCTL (94 bit) in-

formation is stored into DRAM together with two error

flags SDF_Error and TDM_Error indicating the result of

the BCH check.

5.3. Frame Counter Flywheel

The 8 bit frame counter (FCNT) is used in conjunction

with the PRBS generators of the descrambling system.

The correct acquisition of FCNT is essential to maintain

a scrambled service. Therefore, a flywheel technique is

used in a way that a free running frame counter is syn-

chronized from time to time with the received FCNT in

line 625. In this case even the loss of several line 625

data will not disturb the service acquisition.

The CAFCNT LSB is used to select even and odd control

words and allows frame accurate switching from one

phase to the other. Therefore, a similar flywheel tech-

nique is used to protect this LSB. In fact, the internal

CAFCNT LSB is the 9th bit of the free running frame

counter and is synchronized by the actually transmitted

CAFCNT LSB after a majority decision over several

frames.

5.4. RTCI Detector

A special TDMCID code in the TDMCTL indicates the

presence of real time control information (RTCI) trans-

mitted instead of TDMS and LINKS. TDMCID = ‘81’

(hex) is defined to signal the transmission of real time

panning information.

The pan vector PANV is needed for panning the 4:3 por-

tion of a 16:9 picture. In this case the 63 bits of TDMS

and LINKS are substituted with 56 bits of PANV. PANV

is organized in seven bytes giving the pan vector for

seven consecutive frames starting from the second

frame after transmission. Each byte of PANV defines in

2’s complement format the offset of the 4:3 portion from

the center position (see Fig. 7, part 2, p. 79 of ref. 1).

After detection of TDMCID = ‘81’ (hex) the following

seven bytes are stored in a FIFO which is read out once

a frame with one frame delay. If the FIFO is empty the

last byte will be repeated until a new pan vector is re-

ceived. The TDMCTL transmitting the pan vector will be

stored into the line 625 buffer like any other TDMCTL in-

formation.

If user panning is selected by software, the pan vector

inside TDMCID will be ignored and a user defined pan

vector will be used instead, allowing the user to pan the

picture himself. In any case the recently transmitted pan

vector in line 625 is stored in the pan output register to

allow the software to make a smooth return between dif-

ferent pan positions.

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