TMP114 datasheet(23/50 Pages) TI

23 / 50 page

The TMP114 also supports a continuous write to sequential registers. By setting the Auto-Increment bit in the

control register to 1b, the TMP114 will increment the address pointer after each word of data is written to the

device. This allows the controller to write multiple register values in the same transaction as shown in Figure

8-12. Currently this feature will not allow the controller to properly write to the Configuration register and it is

recommended to use single register writes to the Configuration register.

START

Target Address

R/W

ACK from Target

D14 D13 D12 D11 D10 D9

D15

ACK from Target

Data to Register N MSB

Data to Register N LSB

Must be 0h

Target controls SDA line

Controller controls SDA line

Auto-Increment

D14 D13 D12 D11 D10 D9

D15

STOP

ACK from Target

Data to Register N+1 MSB

Data to Register N+1 LSB

Figure 8-12. Burst Write to Multiple Registers

8.5.4.2.1 CRC Enabled Writes

The TMP114 supports the ability to check data integrity with an 8-bit CRC value for every transaction. By

setting the CRC_Enable bit to 1b in the Configuration Register, the device will use CRC to validate any write

transactions. During a CRC enabled write transaction, the TMP114 will check the Target Address, Control

LSB of data sent to the TMP114 will have its own CRC byte for validation. If the first CRC byte fails, the

TMP114 will discard the entire write transaction. If the first CRC passes, the TMP114 will only discard data if

the associated CRC checksum fails. For example, consider the case where a controller tries to write values to

registers 03h, 04h, and 05h. If the first and third CRC values are valid but the second CRC value is incorrect,

the TMP114 will shift the 03h and 05h values into the registers and discard the 04h values. Figure 8-13shows an

overview of a write transaction with CRC.

If the TMP114 determines the CRC failed, it will NACK on the CRC byte and the CRC_Flag bit in the Alert status

and discard the write contents and the status flag will not be set. Multiple writes to the same register in a single

transaction with Auto-Increment set to 0b and CRC enabled is not supported.

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TMP114

SNIS214A – JUNE 2021 – REVISED SEPTEMBER 2021

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