LT8331 datasheet(27/34 Pages) AD

27 / 34 page

LT8357

Rev. 0

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• In the boost configuration, the high dI/dT loop

contains the output capacitor, sense resistor,

power MOSFET and output diode.

• In the flyback configuration, the primary-side

high dI/dT loop contains the input capacitor, pri-

mary winding, power MOSFET and sense resistor.

The secondary-side high dI/dT loop contains the

output capacitor, secondary winding and output

diode.

• In the SEPIC configuration, the high dI/dT loop

contains the power MOSFET, sense resistor, output

capacitor, output diode and coupling capacitor.

APPLICATIONS INFORMATION

• Place the sense resistor, RSENSE, close to the SENSE

pin of the IC, and route SENSE and power GND traces

together. Avoid sense lines pass through noisy areas,

such as switch nodes. If a filtering capacitor is used

between SENSE and GND, place it as close as pos-

sible to the IC. Ensure accurate current sensing with

Kelvin connections at the RSENSE resistor. Low ESL

sense resistor is recommended.

• Connect the VC pin compensation network close to

the IC, between VC and the signal ground. The capaci-

tor helps to filter the effects of PCB noise and output

voltage ripple voltage from the compensation loop.

• Connect the INTVCC bypass capacitor, CINTVCC, close

to the IC, between the INTVCC and power GND. This

capacitor carries the MOSFET gate driver’s current

peaks.

LT8331 Datasheet(PDF) 27 Page - Analog Devices