AD7380 datasheet(22/31 Pages) AD

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AD7381-4

Data Sheet

Rev. 0 | Page 22 of 31

Serial 1-Wire Mode

In applications where slower throughput rates are allowed or

normal averaging oversampling is used, the serial interface can

be configured to operate in 1-wire mode. In 1-wire mode, the

conversion results from ADC A, ADC B, ADC C, and ADC D

are output on SDOA. Additional SCLK cycles are required to

propagate all data. ADC A data is output first followed by the

ADC B, ADC C, and ADC D conversion results.

LOW LATENCY READBACK

The interface on the AD7381-4 has a one-cycle latency as

shown in Figure 38. For applications that operate at lower

throughput rates the latency of reading the conversion result

can be reduced. After the conversion time (tCONVERT) elapses, a

second CS pulse after the initial CS pulse that initiated the

conversion can be used to read back the conversion result. This

operation is shown in Figure 41.

INVALID

S0A

S1A

SDOA

INVALID

S0B

S1B

SDOB

INVALID

S0C

S1C

SDOC

INVALID

S0D

S1D

SDOD

NOP

SDI

Figure 38. Read Conversion Results, 4-Wire Mode

INVALID

SDOA

INVALID

S0D

SDOB

NOP

SDI

Figure 39. Reading Conversion Results, 2-Wire Mode

S0D

INVALID

SDOA

NOP

SDI

Figure 40. Read Conversion Results, 1-Wire Mode

DON'T CARE

ACQ

DON'T CARE

ACQ

INTERNAL

RESULTn

RESULTn + 1

CNVn + 1

CNVn

SDOA

SDOB

SCLK

TARGET SAMPLE PERIOD

Figure 41. Low Throughput Low Latency

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