3.

Device Features

The TA100 device supports several broad features, including secure boot (host code authentication), MAC

generation, secure key and certificate storage and management.

Public information stored within the protected memory, such as code digests, certificate validation status, public keys,

etc., can only be modified when properly authorized by using the specified protocols in this data sheet.

The TA100 is powered by an internal microcontroller running dedicated software loaded into the ROM and nonvolatile

memory during chip manufacture. Nonvolatile memory is used for certificate storage and secret/private key storage.

There is no direct access to the memories from the external pins of the device and there is no available programming

or debug interface.

The block diagram of the TA100 shows the major architectural features of the device.

Figure 3-1. TA100 Block Diagram

Command Processor

Command Processor

FAST Crypto Engine

FAST Crypto Engine

Digest

Keys,

Algorithm

Power

Management

Power

Management

I/O

Logic

I/O

Logic

Commands

Results

Instructions

Data

SPI

GPIO

GPIO

Circuitry

GPIO

Circuitry

RESET

TA100 (B5)

Device Features

and its subsidiaries

Summary Datasheet

DS20006369C-page 8