PIN

NAME

I/O

FUNCTION

1, 2

REF

I/O

Reference. REF is a bypass pin for the reference either driven by the internal reference buffers

or the external reference directly. Bypass these pins with 10µF capacitors to REFGND.

3, 4

REFGND

I

Reference Ground

5

AIN-

I

Negative Analog Input

6

AIN+

I

Positive Analog Input

7

AGND

I

Analog Ground

8

OVDD

I

Digital Interface Supply. Nominally at 1.8V. Bypass to DGND with a 10µF capacitor in parallel

with a 0.1µF capacitor (10µF || 0.1µF).

9

DOUT

O

Digital Output Data

10

DGND

I

Digital Ground

11

DVDD

I

Digital Supply. Nominally at 1.8V. Bypass with a 10µF capacitor in parallel with a 0.1µF

capacitor (10µF || 0.1µF).

12

SCLK

I

Serial Clock Input

13

CNVST

I

Conversion Start. The analog inputs (AIN+, AIN-) are sampled at the rising edge and conversion

process is started.

14

DIN

I

Serial Data Input. DIN data is latched into the serial interface on the rising edge of SCLK.

15

DGND

I

Digital Ground

REF

AIN-

REF

DIN

SCLK

DVDD

DGND

REFGND

CNVST

TQFN

4mm × 4mm

MAX11901

TOP VIEW

REFGND

10

9

8

7

6

12

13

14

15

5

4

3

2

1

16

17

18

19

20

EXPOSED PAD IS GROUND. IT MUST BE SOLDERED TO PCB.

www.maximintegrated.com

Maxim Integrated │ 12

MAX11901

16-Bit, 1.6Msps, Low-Power,

Fully Differential SAR ADC

Pin Description

Pin Configuration