ADXL367 datasheet(39/64 Pages) AD

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Data Sheet

ADXL367

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Table 40. Bit Descriptions for TIME_ACT

Bits

Bit Name

Settings

Description

Reset

Access

Positives section for additional information. The value in this register sets the number of consecutive

samples that must have at least one axis greater than the activity threshold (set by THRESH_ACT) for an

activity event to be detected.

THRESHOLD INACTIVITY BITS[12:6] REGISTER

Address: 0x23, Reset: 0x00, Name: THRESH_INACT_H

Table 41. Bit Descriptions for THRESH_INACT_H

Bits

Bit Name

Settings

Description

Reset

Access

RESERVED

Reserved.

0x0

[6:0]

THRESH_INACT[12:6]

To detect inactivity, the absolute value of the 14-bit acceleration data is compared with

the 13-bit (unsigned) THRESH_INACT value, inactivity = acceleration < acceleration. See

the Motion Detection section for more information. The term, THRESH_INACT, refers to a

13-bit unsigned value comprised of the THRESH_INACT_L registers, which holds its six

LSBs (THRESH_INACT[5:0]) and the THRESH_INACT_H register, which holds its seven

MSBs (THRESH_INACT[12:6]).

0x0

R/W

THRESHOLD INACTIVITY BITS[5:0] REGISTER

Address: 0x24, Reset: 0x00, Name: THRESH_INACT_L

Table 42. Bit Descriptions for THRESH_INACT_L

Bits

Bit Name

Settings

Description

Reset

Access

[7:2]

THRESH_INACT[5:0]

To detect inactivity, the absolute value of the 14-bit acceleration data is compared with the

13-bit (unsigned) THRESH_INACT value, inactivity = acceleration < acceleration. See the

Motion Detection section for more information. The term, THRESH_INACT, refers to a 13-bit

unsigned value comprised of the THRESH_INACT_L register, which holds its six LSBs

(THRESH_INACT[5:0]) and the THRESH_INACT_H register, which holds its seven MSBs

(THRESH_INACT[12:6]).

0x0

R/W

[1:0]

RESERVED

Reserved.

0x0

TIMED INACTIVITY BITS[15:8] REGISTER

Address: 0x25, Reset: 0x00, Name: TIME_INACT_H

Table 43. Bit Descriptions for TIME_INACT_H

Bits

Bit Name

Settings

Description

Reset

Access

[7:0]

TIME_INACT[15:8]

The 16-bit value in these registers sets the number of consecutive samples that must have all

axes lower than the inactivity threshold (set by THRESH_INACT) for an inactivity event to be

detected.

0x0

R/W

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