SiC401A, SiC401BCD

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Vishay Siliconix

S20-0483-Rev. E, 29-Jun-2020

16

Document Number: 63835

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Fig. 4 - Forced Continuous Mode Operation

Ultrasonic Power-Save Operation (SiC401A)

The SiC401A provides ultrasonic power-save operation at

light loads, with the minimum operating frequency fixed at

slightly under 25 kHz. This is accomplished by using an

internal timer that monitors the time between consecutive

high side gate pulses. If the time exceeds 40 μs, DL drives

high to turn the low side MOSFET on. This draws current

(the drive signal for the high side FET) on-time is triggered.

After the on-time is completed, the high side MOSFET is

turned off and the low side MOSFET turns on. The low side

MOSFET remains on until the inductor current ramps down

to zero, at which point the low side MOSFET is turned off.

Because the on-times are forced to occur at intervals no

greater than 40 μs, the frequency will not fall far below

25 kHz. Fig. 5 shows ultrasonic power-save operation.

Fig. 5 - Ultrasonic Power-Save Operation

Power-Save Operation (SiC401B)

The SiC401B provides power-save operation at light loads

with no minimum operating frequency. With power-save

enabled, the internal zero crossing comparator monitors the

inductor current via the voltage across the low side MOSFET

during the off-time. If the inductor current falls to zero for

eight consecutive switching cycles, the controller enters

MOSFET on each subsequent cycle provided that the

power-save operation. It will turn off the low side MOSFET

on each subsequent cycle provided that the current crosses

to the 600 mV threshold. Because the MOSFETs are off, the

load is supplied by the output capacitor.

If the inductor current does not reach zero on any switching

cycle, the controller immediately exits power-save and

returns to forced continuous mode.

Fig. 6 shows power-save operation at light loads.

Fig. 6 - Power-Save Mode

Smart Power-Save Protection

Active loads may leak current from a higher voltage into the

switcher

output.

Under

light

load

conditions

with

reach the over voltage threshold, resulting in a hard

shut-down. Smart power-save prevents this condition.

When the FB voltage exceeds 10 % above nominal, the

device immediately disables power-save, and DL drives

high to turn on the low side MOSFET. This draws current

switching cycle begins. This method prevents a hard OVP

also minimizes operating power by avoiding forced

conduction mode operation. Fig. 7 shows typical waveforms

for the Smart Power Save feature.

FB ripple

Inductor

current

DC load current

FB threshold

(600 mV)

DH

DL

On-time

DH on-time is triggered when

DL drives high when on-time is completed.

FB ripple

Inductor

current

(0A)

FB threshold

(600 mV)

DH

DL

On-time

DH on-time is triggered when

has not reached the FB threshold.

40 µs time-out