SiC401A, SiC401BCD

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Vishay Siliconix

S20-0483-Rev. E, 29-Jun-2020

17

Document Number: 63835

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

Fig. 7 - Smart Power-Save

For each DH pulse, the DH driver initially turns on the high

side MOSFET at a lower speed, allowing a softer, smooth

turn-off of the low side diode. Once the diode is off and the

circuit automatically drives the high side MOSFET on at a

rapid rate. This technique reduces switching losses while

maintaining high efficiency and also avoids the need for

snubbers for the power MOSFETs.



Current Limit Protection

The device features programmable current limiting, which is

is also the drain of the low side MOSFET. When the low side

across the resistor. While the low side MOSFET is on, the

inductor current flows through it and creates a voltage

negative with respect to ground. If this MOSFET voltage

pin will be negative and current limit will activate. The

current limit then keeps the low side MOSFET on and will not

allow another high side on-time, until the current in the low

up to zero. This method regulates the inductor valley current

Fig. 8 - Valley Current Limit

Setting the valley current limit to 15 A results in a peak

inductor current of 15 A plus peak ripple current. In this

situation, the average (load) current through the inductor is

15 A plus one-half the peak-to-peak ripple current.

The

internal

10

μA

current

source

is

temperature

compensated at 4100 ppm in order to provide tracking with





current sensing, the PCB layout, solder connections, and

PCB connection to the LX node must be done carefully to

LXS (pin 28).

Soft-Start of PWM Regulator

SiC401A/B has a programmable soft-start time that is

controlled by an external capacitor at the SS pin. After the

controller meets both UVLO and EN/PSV thresholds, the

controller has an internal current source of 3 μA flowing

through the SS pin to charge the capacitor. During the start

up process (Fig. 9), 50 % of the voltage at the SS pin is used

as the reference for the FB comparator. The PWM

comparator issues an on-time pulse when the voltage at the

FB pin is less than 40 % of the SS pin. As a result, the output

voltage follows the SS voltage. The output voltage reaches

and maintains regulation when the soft start voltage

is

 1.5 V. The time between the first LX pulse and V

OUT

calculation for the soft-start time is shown by the following

equation.



The voltage at the SS pin continues to ramp up and

completes, the FB pin voltage is compared to an internal

following equation.

Smart power save

threshold (825 mV)

FB

threshold

DH and DL off

High-side

drive (DH)

Low-side

drive (DL)

and low-side MOSFET

Single DH on-time pulse

after DL turn-off

Normal DL pulse after DH

on-time pulse

DL turns on when smart

PSAVE threshold is reached

DL turns off FB

threshold is reached

Time

t

1.5 V

3 μA

t

C

3 μA