OPA656 datasheet(9/25 Pages) TI

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8 Detailed Description

8.1 Overview

The OPA817 is a high voltage, unity gain stable, 390 MHz gain-bandwidth product (GBWP), voltage feedback

operational amplifier (op amp) featuring a 4.5 nV/√Hz low noise JFET input stage. The low offset voltage (250 μV

maximum), offset voltage drift (4 μV/°C maximum), and unity gain bandwidth of 800 MHz makes it ideal for high

input impedance, high-speed data acquisition front-ends. The high voltage capability combined with 970 V/µs

slew rate enables applications needing wide output swings (9 VPP at VS = 12 V) for high-frequency signals such

as those often found in medical instrumentation, optical front-end, test, and measurement applications. The low

noise JFET input with pico-amperes of bias current makes the device attractive in high-gain TIA applications and

in test and measurement front-ends. OPA817 also features a power-down mode that disables the core amplifier

for power savings.

The OPA817 is built using TI's proprietary high-voltage, high-speed, complementary bipolar SiGe process.

8.2 Functional Block Diagram

The OPA817 is a conventional voltage feedback op amp with two high-impedance inputs and a low-impedance

output. Figure 8-1 and Figure 8-2 shows two standard amplifier configuration examples that are supported for

this device. The reference voltage (VREF) level shifts the DC operating point for each configuration, which is

typically set to mid-supply in single-supply operation. VREF is typically set to ground in split-supply applications.

VIN

VREF

VSIG

VREF

(1 + RF / RG) × VSIG

VOUT

VS+

VS±

Figure 8-1. Noninverting Amplifier

VIN

VREF

VSIG

VREF

±(RF / RG) × VSIG

VOUT

VS+

VS±

Figure 8-2. Inverting Amplifier

8.3 Feature Description

8.3.1 Input and ESD Protection

The OPA817 is built using a very high-speed complementary bipolar process. The internal junction breakdown

voltages are relatively low for these very small geometry devices. These breakdowns are reflected in the

Absolute Maximum Ratings. As Figure 8-3 shows, all device pins are protected with internal ESD protection

diodes to the power supplies.

The diodes provide moderate protection to input overdrive voltages beyond the supplies as well. The protection

diodes can typically support a 10-mA continuous current. Where higher currents are possible (for example, in

systems with ±12-V supply parts driving into the OPA817), current limiting series resistors should be added in

series with the two inputs to limit the current. Keep these resistor values as low as possible because high values

degrade both noise performance and frequency response. There are no back-to-back ESD diodes between VIN+

and VIN–. As a result, the differential input voltage between VIN+ and VIN– is entirely absorbed by the VGS of the

input JFET differential pair and must not exceed the voltage ratings shown in the Absolute Maximum Ratings.

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OPA817

SBOS847 – JULY 2022

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