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ACEX1K Datasheet(PDF) 70 Page - Altera Corporation

Part # ACEX1K
Description  Programmable Logic Device Family
PDF  86 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

ACEX1K Datasheet(HTML) 70 Page - Altera Corporation

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Altera Corporation
ACEX 1K Programmable Logic Device Family Data Sheet
Notes to tables:
(1)
All timing parameters are described in Tables 22 through 29 in this data sheet.
(2)
These parameters are specified by characterization.
(3)
This parameter is measured without the use of the ClockLock or ClockBoost circuits.
(4)
This parameter is measured with the use of the ClockLock or ClockBoost circuits.
Tables 44 through 50 show EP1K50 device external timing parameters.
Table 43. EP1K30 External Bidirectional Timing Parameters
Notes (1), (2)
Symbol
Speed Grade
Unit
-1
-2
-3
Min
Max
Min
Max
Min
Max
tINSUBIDIR (3)
2.8
3.9
5.2
ns
tINHBIDIR (3)
0.0
0.0
0.0
ns
tINSUBIDIR (4)
3.8
4.9
–
ns
tINHBIDIR (4)
0.0
0.0
–
ns
tOUTCOBIDIR (3)
2.0
4.9
2.0
5.9
2.0
7.6
ns
tXZBIDIR (3)
6.1
7.5
9.7
ns
tZXBIDIR (3)
6.1
7.5
9.7
ns
tOUTCOBIDIR (4)
0.5
3.9
0.5
4.9
––
ns
tXZBIDIR (4)
5.1
6.5
–
ns
tZXBIDIR (4)
5.1
6.5
–
ns
Table 44. EP1K50 Device LE Timing Microparameters (Part 1 of 2)
Note (1)
Symbol
Speed Grade
Unit
-1
-2
-3
Min
Max
Min
Max
Min
Max
tLUT
0.6
0.8
1.1
ns
tCLUT
0.5
0.6
0.8
ns
tRLUT
0.6
0.7
0.9
ns
tPACKED
0.2
0.3
0.4
ns
tEN
0.6
0.7
0.9
ns
tCICO
0.1
0.1
0.1
ns
tCGEN
0.4
0.5
0.6
ns
tCGENR
0.1
0.1
0.1
ns
tCASC
0.5
0.8
1.0
ns
tC
0.5
0.6
0.8
ns



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