EM78P451WM datasheet(17/54 Pages) EMC

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EM78P451

8-Bit Microcontroller with OTP ROM

Product Specification (V1.1) 06.30.2003

• 13

(This specification is subject to change without further notice)

Bit 5 (WDTE)

Control bit used to enable Watchdog timer.

The WDTE bit can be used only if ENWDT, the CODE Option bit, is "1".

If the ENWDT bit is "1", then WDT can be disabled/enabled by the

WDTE bit.

0: Disable WDT.

1: Enable WDT.

The WDTE bit is not used if ENWDT, the CODE Option bit ENWDT, is

"0". That is, if the ENWDT bit is "0", WDT is always disabled no matter

what the WDTE bit is.

The WDTE bit can be read and written.

Bit 6 (ODE)

Open-drain control bit.

0: Both P76 and P77 are normally I/O pins.

1: Both P76 and P77 pins have the open-drain function inside.

The ODE bit can be read and written.

Bits 1~2, and 7

Not used.

4.2.7 IOCF (Interrupt Mask Register)

TM1IE

SPIIE

EXIE

TCIE

Bit 0 (TCIE)

TCIF interrupt enable bit.

0: disable TCIF interrupt

1: enable TCIF interrupt

Bit 1 (EXIE)

EXIF interrupt enable bit.

0: disable EXIF interrupt

1: enable EXIF interrupt

Bit 2 (SPIIE)

SPI interrupt enable bit.

0: disable SPI interrupt

1: enable SPI interrupt

Bit 3 (TM1IE)

TM1IE interrupt enable bit.

0: disable TM1IE interrupt

1: enable TM1IE interrupt

Bits 4~7

Not used.

Individual interrupt is enabled by setting its associated control bit in IOCF to "1".

The IOCF Register could be read and written.

EM78P451WM Datasheet(PDF) 17 Page - ELAN Microelectronics Corp

EM78P451WM Datasheet(HTML) 17 Page - ELAN Microelectronics Corp

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