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LPC55S69JBD64 Datasheet(PDF) 27 Page - NXP Semiconductors

Part # LPC55S69JBD64
Description  32-bit Arm Cortex®-M33; M33 coprocessor, TrustZone, PowerQuad, CASPER, 320 KB SRAM; 640 KB flash, USB HS, Flexcomm Interface, SDIO, 32-bit counter/ timers, SCTimer/PWM, PLU, 16-bit 1.0 Msamples/sec ADC, Comparator,...
PDF  140 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC55S69JBD64 Datasheet(HTML) 27 Page - NXP Semiconductors

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LPC55S6x
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© NXP Semiconductors N.V. 2022. All rights reserved.
Product data sheet
Rev. 2.4 — 8 December 2022
27 of 138
NXP Semiconductors
LPC55S6x
32-bit ARM Cortex-M33 microcontroller
PIO1_0/
ADC0_11
4
E1
11
[4]
Z
I/O
; AI
0
PIO1_0/ADC0_11 — General-purpose digital input/output
pin. ADC single ended input channel 3B - CH3B. Can
optionally be paired with CH3A as the negative differential
input on ADC1 channel 3.
I/O 1
FC0_RTS_SCL_SSEL1 — Flexcomm 0: USART
request-to-send, I2C clock, SPI slave select 1.
I/O 2
SD0_D[3] — SD/MMC 0 data 3.
I
3
CTIMER_INP2 — Capture input to CTIMER input
multiplexers.
I
4
SCT0_GPI4 — Pin input 4 to SCTimer/PWM.
5
R — Reserved.
6
R — Reserved.
7
R — Reserved.
8
R — Reserved.
O
9
PLU_OUT3 — PLU output 3.
PIO1_1/
WAKEUP
39
G11
59
[2][8]
Z
I/O 0
PIO1_1 — General-purpose digital input/output pin.
This pin can trigger a wake-up from deep power-down
mode.
WAKEUP pin can be configured as rising or falling edge
Remark: In ISP mode, this pin is set to the High Speed SPI
SSEL1 function (Flexcomm 8)
I/O 1
FC3_RXD_SDA_MOSI_DATA — Flexcomm 3: USART
receiver, I2C data I/O, SPI master-out/slave-in data, I2S
data I/O.
2
R — Reserved.
I
3
CTIMER_INP3 — Capture input to CTIMER input
multiplexers.
I
4
SCT0_GPI5 — Pin input 5 to SCTimer/PWM.
I/O 5
HS_SPI_SSEL1 — Slave Select 1 for high speed SPI.
6
R — Reserved.
I
7
USB1_OVERCURRENTN — USB1 bus overcurrent
indicator (active low).
8
R — Reserved.
O
9
PLU_OUT4 — PLU output 4.
Table 3.
Pin description …continued
Symbol
Description



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