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FXPS7115D4S Datasheet(PDF) 48 Page - NXP Semiconductors |
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FXPS7115D4S Datasheet(HTML) 48 Page - NXP Semiconductors |
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48 / 74 page  NXP Semiconductors FXPS7115D4S Digital absolute pressure sensor, 40 kPa to 115 kPa Location Bit Address Symbol 7 6 5 4 3 2 1 0 64h SNSDATA1_L SNSDATA1_L[7:0] 65h SNSDATA1_H SNSDATA1_H[15:8] Factory default 0 0 0 0 0 0 0 0 Access R R R R R R R R Table 82. SNSDATA1_L, SNSDATA1_H - sensor data #1 registers (address 64h, 65h) bit allocation 7.7.19 SNSDATA0_TIMEx - timestamp registers (address 66h to 6Bh) The sensor data 0 timestamp registers are read-only registers that contain a 48-bit timestamp. The value of the 48-bit free running timer register is copied to the sensor data 0 timestamp registers each time sensor data 0 data is latched for transmission. The timestamp is updated at the start of the sensor data 0 register value transmission for a register read of the SNSDATA0_L register. The timestamp register is organized to allow for optimized reading of the timestamp in I2C automatic sensor data register read wrap-around mode as documented in Table 9. The sensor data 0 timestamp registers are read-only registers that contain a 48-bit timestamp. The value of the 48-bit free running timer register is copied to the sensor data 0 timestamp registers each time sensor data 0 data is latched for transmission via SPI. Location Bit Address Symbol 7 6 5 4 3 2 1 0 66h SNSDATA0_TIME0 SNSDATA0_TIME[7:0] 67h SNSDATA0_TIME1 SNSDATA0_TIME[15:8] 68h SNSDATA0_TIME2 SNSDATA0_TIME[23:16] 69h SNSDATA0_TIME3 SNSDATA0_TIME[31:24] 6Ah SNSDATA0_TIME4 SNSDATA0_TIME[39:32] 6Bh SNSDATA0_TIME5 SNSDATA0_TIME[47:40] Factory default 0 0 0 0 0 0 0 0 Access R R R R R R R R Table 83. SNSDATA0_TIMEx - timestamp register (address 66h to 6Bh) bit allocation 7.7.20 P_MAX, P_MIN - maximum and minimum absolute pressure value registers (address 6Ch to 6Fh) The minimum and maximum absolute pressure value registers are read-only registers that contain a sample-by-sample continuously updated minimum and maximum 16- bit absolute pressure value. The value is reset to 0000h on a write to a DSP_CFG_U1 register that changes the value of the LPF[2:0] or ST_CTRL[3:0]. The values of P_Max and P_Min obtained during a SPI or I2C register read might not always be the same value as the instantaneous pressure value obtained from the SNSDATA_x registers. These registers are readable in SPI mode or I2C mode. In I2C mode, the P_xxx_H register value is latched on a read of the P_xxx_L register value until the P_xxx_H FXPS7115D4S All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved. Objective data sheet Rev. 1 — 9 August 2022 48 / 74 |
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