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EM6821 Datasheet(PDF) 51 Page - EM Microelectronic - MARIN SA |
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EM6821 Datasheet(HTML) 51 Page - EM Microelectronic - MARIN SA |
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51 / 68 page ![]() R EM6821 Copyright © 2005, EM Microelectronic-Marin SA 51 www.emmicroelectronic.com Register Name Add Hex Add Dec. Reset Value Read Bits Write Bits Remarks b'3210 Read / Write Bits RegPBData 52 82 0000 0: PB[0] 1: PB[1] 2: PB[2] 3: PB[3] 0: PBData[0] 1: PBData[1] 2: PBData[2] 3: PBData[3] Port B data output Pin port B read Default : 0 RegSCntl1 53 83 0000 0: MSBnLSB 1: POSnNeg 2: MS0 3: MS1 Serial interface control 1 RegSCntl2 54 84 0000 0: OM[0] 1: OM[1] 2: Status 3: Start Serial interface control 2 RegSDataL 55 85 0000 0: SerDataL[0] 1: SerDataL[1] 2: SerDataL[2] 3: SerDataL[3] Serial interface low data nibble RegSDataH 56 86 0000 0: SerDataH[0] 1: SerDataH[1] 2: SerDataH[2] 3: SerDataH[3] Serial interface high data nibble RegSPData 57 87 0000 0: PSP[0] 1: PSP[1] 2: PSP[2] 3: PSP[3] 0: SerPData[0] 1: SerPData[1] 2: SerPData[2] 3: SerPData[3] Serial interface parallel data out RegMelFSel 58 88 0000 0: MelFSel[0] 1: MelFSel[1] 2: MelFSel[2] 3: BzOutEn Melody frequency select and output enable control RegMelTim 59 89 0000 0:FTimSel0 1:FTimSel1 2:Auto 3:FlBuzzer 0:FTimSel0 1:FTimSel1 2:Auto 3:SwBuzzer Melody timer control RegMelPeri 5A 90 0000 0: - 1: - 2: - 3: - 0: Per[0] 1: Per[1] 2: Per[2] 3: Per[3] Melody timer period RegCCntl1 5B 91 0000 0: CountFSel0 1: CountFSel1 2: CountFSel2 3: UP/Down 10-bit counter control 1; frequency and up/down RegCCntl2 5C 92 0000 0: '0' 1: EnComp 2: EvCount 3: Start 0 : Load 1: EnComp 2: EvCount 3: Start 10-bit counter control 2; comparison, event counter and start RegCDataL 5D 93 0000 0: Count[0] 1: Count[1] 2: Count[2] 3: Count[3] 0: CReg[0] 1: CReg[1] 2: CReg[2] 3: CReg[3] 10-bit counter data low nibble RegCDataM 5E 94 0000 0: Count[4] 1: Count[5] 2: Count[6] 3: Count[7] 0: CReg[4] 1: CReg[5] 2: CReg[6] 3: CReg[7] 10-bit counter data middle nibble RegCDataH 5F 95 0000 0: Count[8] 1: Count[9] 2: BitSel[0] 3: BitSel[1] 0: CReg[8] 1: CReg[9] 2: BitSel[0] 3: BitSel[1] 10 bit counter data high bits RegMSCCntl1 60 96 0000 0: '0' 1: dT/MSC 2: PA3/µP 3:RunEn/Stop 0: ResMSC 1: dT/MSC 2: PA3/µP 3:RunEn/Stop millisecond counter control register 1; reset, delta time, control source |
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