89TSF552 datasheet(4/39 Pages) RENESAS

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June 17, 2005

IDT 89TSF552

*Notice: The information in this document is subject to change without notice

Signal Name

I/O Type

Dir.

Freq.

Remarks

TCK (pin E19)

3.3V LVTTL

—

33K internal pullup

TDI (pin F19)

3.3V LVTTL

—

33K internal pullup

TDO (pin C18)

3.3V LVTTL

—

33K internal pullup

TMS (pin D19)

3.3V LVTTL

—

33K internal pullup

TRST_N (pin C19)

3.3V LVTTL

—

33K internal pullup

Table 4 89TSF552 Test and Debugging Pins

Signal Name

I/O Type

Dir.

Freq.

Remarks

ZTICK (pin AU12)

3.3V LVTTL

—

External reference ZTick input to which the internal ZTick logic

will synchronize.

If ZTICK_MODE is 0, ZTICK can be left open

ZTICK_MODE (pin AP16)

3.3V LVTTL

—

External ZTick select. (Enable external ZTick sync.)

1 = internal ZTick to be synchronized to ext. reference ZTick

0 = internal ZTick is async to any ext. ZTick.

Pin(s) must be stable at least 16 ns before the deassertion of

the RESET_N input. Any change in pin(s) after 16 ns before

the deassertion of the RESET_N input must be concurrent

with, or followed by, an assertion of the RESET_N input.

Table 5 89TSF552 ZTick Management Pins

Signal Name

I/O Type

Dir.

Freq.

Remarks

CRX_REFCLK (pin AH1)

3.3V LVTTL

75-125MHz CSIX Rx reference clock. This reference clock controls the bit

rate on the CRX control bus outputs.

PLL_CRX_RST (pin AH5)

3.3V LVTTL

—

PLL_CRX_LCK (pin AH6)

3.3V LVTTL

—

PLL_CRX_VDD (pin AD9)

1.8V AVDD

—

Digital power (1.8V)

PLL_CRX_VDDA (pin AC9)

3.3V AVDD

—

Analog power (3.3V)

PLL_CRX_VSS (pin AD10)

VSS

—

Digital ground

PLL_CRX_VSSA (pin AC10)

AVSS

—

Analog ground

CTX_REFCLK (pin F1)

3.3V LVTTL

75-125MHz CSIX Tx reference clock. This reference clock controls the bit

rate on the CTX data bus outputs.

PLL_CTX_RST (pin G3)

3.3V LVTTL

—

PLL_CTX_LCK (pin G4)

3.3V LVTTL

—

PLL_CTX_VDD (pin U9)

1.8V AVDD

—

Digital power (1.8V)

PLL_CTX_VDDA (pin T9)

3.3V AVDD

—

Analog power (3.3V)

PLL_CTX_VSS (pin U10)

VSS

—

Digital ground

PLL_CTX_VSSA (pin T10)

AVSS

—

Analog ground

Table 6 89TSF552 CSIX PLL Pins

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