DA9053 datasheet(90/185 Pages) RENESAS

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DA9053

Flexible High-Power System PMIC with 1.8 A

Switching USB Power Manager

Datasheet

Revision 2.1

31-Aug-2016

CFR0011-120-00

90 of 183

13 GPIO Extender

The DA9053 includes a GPIO extender that offer up to 16 VDDOUT-tolerant (5.5 V max) general

purpose input/output pins; each controlled by registers from the host.

NOTE

The input voltage has to be lower than the VDDIO level selected for the port.

The GPIO ports are pin-shared with ports from GP-ADC, TSI-interface, HS-2-wire interface and

signals from the power manager and can be individually assigned. Configuration settings and events

from several GPIx ports are shared with alternate features. For example, if ADCIN5 was selected,

overriding the configured thresholds will trigger a GPI1 event that generates a maskable GPI1

interrupt. The GPI active High/Low setting from GPIOx_Type register and the selection of supply rail

(and pull-up resistor) is also valid for the alternate port features selected via GPIOx_PIN (for example

SYS_EN, PWR_EN and PWR1_EN). The same is true for GPIOx_MODE to enable triggering a

Wake-up event (ADCIN4, ADCIN5, SYS_EN, PWR_EN, PWR1_EN, HS-2-wire interface) for the

alternate features.

In ACTIVE and POWER-DOWN mode the GPIO Extender can continuously monitor the level of ports

that are selected as general purpose inputs. GPIs are supplied from the internal rail VDDCORE or

VDD_IO2 and can be configured to trigger events in active high or active low mode. The input signals

can be debounced or directly change the state of the assigned status register GPIx to high or low.

Whenever the status has changed to its configured active state (edge sensitive) the assigned event

debouncing off mode GPI 12 enables/disables LDO9, the minimum enable time is 100 µs. The same

feature is available at GPI 1 for LDO4_EN and GPI 2 for LDO5_EN. Events on GPI10 can be used to

control the progress of the power sequencer. Processing ID WAIT_STEP will cause the sequencer to

wait until GPI 10 changes into active state.

If defined as an output the GPO can be configured as open-drain or push-pull. The supply rail can be

individually selected from either VDD_IO1 or VDD_IO2. When selecting VDD_IO1 in open-drain

mode, there is an internal pull-up resistor against this rail, otherwise an external pull-up resistor

towards the target voltage level is required. The output state will be assigned as configured by the

GPIO register bit GPIOx_MODE.

GPO 10 and 11 are high-power GPO ports, where the maximum sink current is rated to be 15 mA

and the maximum source current will be 4 mA. This enables driving LEDs with optional RTC timer

controlled flashing.

GPO 14 and 15 are high-power GPO ports able to sink up to 30 mA and include an optional PWM

control. The PWM control can also be made to dim the brightness between its current value and a

new value at a rate of 32 ms per step. In conjunction with the LED3 drive, which offers a similar PWM

mode, this creates a common anode tri-color LED brightness control.

Address

Bit

Type

Label

Description

R21

GPIO_0-1

1:0

R/W

GPIO0_PIN

PIN assigned to

00: ADCIN4

01: GPI

10: GPO (Open drain)

11: GPO (Push-pull)

R/W

GPIO0_Type

0: GPI: active low

GPO: supplied from VDD_IO1/internal pull-up in

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