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AD9389/PCB Datasheet(PDF) 6 Page - Analog Devices

Part # AD9389/PCB
Description  800 MHz High Performance HDMI/DVI Transmitter
PDF  48 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9389/PCB Datasheet(HTML) 6 Page - Analog Devices

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AD9389
Rev. 0 | Page 6 of 48
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
2
D0
3
DE
4
HSYNC
7
S/PDIF
6
CLK
5
VSYNC
1
DVDD
8
MCLK
9
I2S0
10
I2S1
12
I2S3
13
SCLK
14
LRCLK
15
GND
16
PVDD
17
GND
18
GND
19
PVDD
20
PVDD
11
I2S2
59
58
57
54
55
56
60
53
52
GND
D15
D16
D19
D18
D17
GND
D20
D21
51
D22
49
NC
48
NC
47
SDA
46
SCL
45
DDSDA
44
DDCSCL
43
GND
42
GND
41
AVDD
50
D23
21 22 23
24 25 26 27
28 29 30
31 32 33 34 35 36 37 38 39 40
80 79
78
77 76 75 74
73 72 71
70 69 68 67 66 65 64 63 62 61
PIN 1
AD9389
TOP VIEW
(Not to Scale)
Figure 2. Pin Configuration
Table 4. Complete Pinout List
Pin Type
Pin No.
Mnemonic
Description
Value
INPUTS
50 to 58,
65 to 78, 2
D[23:0]
Video Data Input
1.8 V CMOS
6
CLK
Video Clock Input
1.8 V CMOS
3
DE
Data Enable Bit for Digital Video
1.8 V CMOS
4
HSYNC
Horizontal SYNC Input
1.8 V CMOS
5
VSYNC
Vertical SYNC Input
1.8 V CMOS
23
EXT_SW
Differential Output Swing Adjustment
1.8 V CMOS
25
HPD
Hot Plug Detect Signal
1.8 V CMOS
7
S/PDIF
S/PDIF (Sony/Philips Digital Interface) Audio Input Pin
1.8 V CMOS
8
MCLK
Audio Reference Clock, from 128 × fS to 512 × fS
1.8 V CMOS
12 to 9
I2S[3:0]
I2S Audio Data Inputs
1.8 V CMOS
13
SCLK
I2S Audio Clock
1.8 V CMOS
14
LRCLK
Left/Right Channel Selection
1.8 V CMOS
33
PD/A0
Power-Down Control
1.8 V CMOS
OUTPUTS
28, 27
TxC+
Differential Clock Output
TMDS
TxC−
Differential Clock Output Complement
38, 37
Tx2+
Differential Output Channel 2
TMDS
Tx2−
Differential Output Channel 2 Complement
35, 34
Tx1+
Differential Output Channel 1
TMDS
Tx1−
Differential Output Channel 1 Complement



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