AD9389

Rev. 0 | Page 13 of 48

YCbCr 4:2:2 Formats (24 bits, 20 bits, or 16 bits) DDR with Separate Sync, Input ID = 6

An input format of YCbCr 4:2:2 DDR can be selected by setting the input ID (0x15[3:1]) to 0b110. The three different input pin

assignment styles are shown in Table 16. The input style can be set in 0x16[3:2]. The input CS (0x16[0]) must be set to 0b1. The data bit

width (12 bits, 10 bits, or 8 bits) must be set to with 0x16[5:4].

Pixel 0 is the first pixel of the 4:2:2 word and should be where DE starts.

Table 16.

Data[23:0]

Input Format

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

Style 1

Y[7:4]

Cb[3:0]

Y[3:0]

Edge

Cb[11:4]

Y[11:8]

Y[7:4]

Cr[3:0]

Y[3:0]

YCbCr 4:2:2 Sep.

Syncs (DDR)

12-bit

Cr[11:4]

Y[11:8]

Y[5:4]

Cb[3:0]

Y[3:0]

Cb[9:4]

Y[9:6]

Y[5:4]

Cr[3:0]

Y[3:0]

YCbCr 4:2:2 Sep.

Syncs (DDR)

10-bit

Cr[9:4]

Y[9:6]

Cb[3:0]

Y[3:0]

Cb[7:4]

Y[7:4]

Cr[3:0]

Y[3:0]

YCbCr 4:2:2 Sep.

Syncs (DDR)

8-bit

Cr[7:4]

Y[7:4]

Style 2

Y[11:0]

Cb[11:0]

Y[11:0]

12-bit

Cr[11:0]

Y[9:0]

Cb[9:0]

Y[9:0]

10-bit

Cr[9:0]

Y[7:0]

Cb[7:0]

Y[7:0]

8-bit

Cr[7:0]

Style 3

Cb[11:0]

Y[11:0]

Cr[11:0]

12-bit

Y[11:0]

Cb[9:0]

Y[9:0]

Cr[9:0]

10-bit

Y[9:0]

Cb[7:0]

Y[7:0]

Cr[7:0]

8-bit

Y[7:0]