AD9389

Rev. 0 | Page 20 of 48

2-WIRE SERIAL REGISTER MAP

The AD9389 is initialized and controlled by a set of registers that determine the operating modes. An external controller is employed to

write and read the control registers through the two-line serial interface port.

Table 22. Control Register Map

Hex

Address

Read/Write or

Read Only

Bits

Default

Value

Register Name

Description

0x00

Read

[7:0]

00000000

Chip Revision

Revision of the chip, start from 0.

0x01

Read/Write

[3:0]

****0000

N[19:16]

20-bit N used with cycle time stamp (CTS) (see Table

18 to Table 20 for appropriate settings) to regenerate

the audio clock in the receiver. For remaining bits, see

0x02

Read/Write

[7:0]

00000000

N[15:8]

The middle byte of N.

0x03

Read/Write

[7:0]

00000000

N[7:0]

The lower byte of N.

[7:4]

0000****

S/PDIF_SF

S/PDIF sampling frequency for S/PDIF audio decoded

from hardware. This information is used both by the

audio Rx and the pixel repetition.

0011 = 32 kHz.

0000 = 44.1 kHz.

0010 = 48 kHz.

1000 = 88.2 kHz.

1010 = 96 kHz.

1100 = 176.4 kHz.

1110 = 192 kHz.

Default = 0x0.

0x04

Read

[3:0]

****0000

CTS_Int[19:16]

CTS measured (internal). This 20-bit value is used in

the receiver with the N value to regenerate an audio

clock. For remaining bits, see 0x05 and 0x06.

0x05

Read

[7:0]

00000000

CTS_Int[15:8]

Middle byte of measured CTS.

0x06

Read

[7:0]

00000000

CTS_Int[7:0]

Low byte of measured CTS.

0x07

Read/Write

[3:0]

****0000

CTS_Ext[19:16]

CTS (external). This 20-bit value is used in the receiver

with the N value to regenerate an audio clock. For

remaining bits, see 0x08 and 0x09.

0x08

Read/Write

[7:0]

00000000

CTS_Ext[15:8]

Middle byte of external CTS.

0x09

Read/Write

[7:0]

00000000

CTS_Ext[7:0]

Low byte of external CTS.

[7]

0*******

CTS_Sel

CTS source select.

0 = internal CTS.

1 = external CTS.

Default = 0.

[6:5]

*10*****

Avg_Mode

CTS filter mode.

00 = no filter.

01 = divide by 4.

10 = divide by 8.

11 = divide by16.

Default = 10.

[4]

***0****

Audio_Sel

Audio type select.

1 = S/PDIF.

Default = 0.

[3]

****0***

MCLK_SP

MCLK for S/PDIF.

1 = MCLK active.

0 = MCLK inactive.

Default = 0.

[2]

*****0**

Default = 0.

0x0A

Read/Write

[1:0]

******01

MCLK_Ratio

MCLK ratio.