601 Hardware Specifications, Rev 3

9

Preliminary/Subject to Change without Notice

Notes: 1. The timing diagram should only be referenced in regard to the edge-to-edge measurement of the timing

specifications. It is not intended as a functional description of the input and output signals. Refer to the

PowerPC 601 RISC Microprocessor User’s Manual for functional descriptions and their related

diagrams for device operation.

2. VM = Midpoint voltage (1.4 V)

Figure 2. PowerPC 601 Microprocessor Input Timing Diagram

VM

9.0

2X_PCLK

BCLK_EN

ARTRY, DB-

WO, TS, XATS

ABB, AACK,

BG, TA, DBB,

DBG, DRTRY,

TEA

Test signals

All other

signals

10.1

10.2

10.3

10.4

10.0

9.1

9.2

9.3

9.4

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com