CS5920 datasheet(31/160 Pages) AMCC

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S5920 – PCI Product

Revision 1.01 – November 28, 2005

AMCC Confidential and Proprietary

DS1596

Data Book

ADD-ON BUS AND S5920 CONTROL SIGNALS

The following sets of signals represent the interface signals available for the user Add-On bus and S5920 control.

Table 16. Serial nvRAM Interface Signals

Signal

Type

Description

SCL

o/d-out

Serial Clock. This clock provides timing for all transactions on the two-wire serial bus. The S5920 drives

this signal when performing as a serial bus master. SCL operates at the maximum allowable clock

speed and enters the high Z state when FLT# is asserted or the serial bus is inactive.

SDA

o/d

Serial Data/Address. This bi-directional signal carries serial address and data information between

nvRAMs and the S5920. This pin enters high Z state when FLT# is asserted or the serial bus is inactive.

Pin 135

Reserved. Must be left open.

Table 17. Direct Mailbox Access Signals

Signal

Type

Description

MDMODE

Mailbox Data Mode. The MD[7:0] signal pins are always inputs when this signal is high. The MD[7:0]

signal pins are defined as inputs and outputs under LOAD# control when MDMODE is low. This pin is

provided for software compatibility with the S5933. New designs should permanently connect this sig-

nal low. This signal is connected to an internal pull-up.

LOAD#

MD[7:0] is defined as an input bus when this signal is low. The next rising edge of the ADCLK will latch

MD[7:0] data into byte three of the Add-On outgoing mailbox. When LOAD# is high and MDMODE is

low, MD[7:0] are defined as outputs displaying byte three of the PCI outgoing mailbox. This signal is

connected to an internal pull-up.

MD[7:0]

t/s

Mailbox Data bus. The mailbox data registers can be directly accessed using the LOAD# and

MDMODE signals. When configured as an input, data byte three of the PCI incoming mailbox is

directly written to from these pins. When configured as an output, data byte three of the PCI outgoing

mailbox is output to these pins. All MD[7:0] signals have an internal pull-up.

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