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CS5920 Datasheet(PDF) 61 Page - Applied Micro Circuits Corporation |
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CS5920 Datasheet(HTML) 61 Page - Applied Micro Circuits Corporation |
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61 / 160 page  S5920 – PCI Product Revision 1.01 – November 28, 2005 AMCC Confidential and Proprietary DS1596 61 Data Book 1. The Expansion ROM Base Address Register nvRAM boot value is internally hardwired to FFFFF80Xh, where X = 000xb (i.e., only the least- significant bit, or Address Decode Enable bit, is programmable). This defines both the minimum and maximum expansion ROM size sup- ported by the S5920 (2K bytes). The Address Decode Enable bit in the nvRAM (the LSB) must be set to enable this region. If not set, a PCI Configuration read of this region will always respond with 00000000h. Table 38. Read Response to Expansion ROM Base Address Register (after all ones written) Response Size in Bytes nvRAM boot value 00000000h none - disabled 00000000h or BIOS missing 1 FFFFF801h 2K bytes (512 DWORDs) FFFFF801h |
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