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AD8191ASTZ Datasheet(PDF) 22 Page - Analog Devices

Part # AD8191ASTZ
Description  4:1 HDMI/DVI Switch with Equalization
PDF  32 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD8191ASTZ Datasheet(HTML) 22 Page - Analog Devices

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AD8191
Rev. 0 | Page 22 of 32
RECEIVER SETTINGS REGISTER
RX_TO: High Speed (TMDS) Channels Input Termination
On/Off Select Bit
Table 16. RX_TO Description
RX_TO
Description
0
Input termination off
1
Input termination on (can be pulsed on and off
according to settings in the input termination
pulse register)
INPUT TERMINATION PULSE REGISTER 1 AND
REGISTER 2
RX_PT[X]: High Speed (TMDS) Input Channel X
Pulse-On-Source Switch Select Bit
Table 17. RX_PT[X] Description
RX_PT[X]
Description
0
Input termination for TMDS Channel X always
connected when source is switched
1
Input termination for TMDS Channel X
disconnected for 100 ms when source switched
Table 18. RX_PT[X] Mapping
RX_PT[X]
Corresponding Input TMDS Channel
Bit 0
B0
Bit 1
B1
Bit 2
B2
Bit 3
B3
Bit 4
A0
Bit 5
A1
Bit 6
A2
Bit 7
A3
Bit 8
C3
Bit 9
C2
Bit 10
C1
Bit 11
C0
Bit 12
D3
Bit 13
D2
Bit 14
D1
Bit 15
D0
RECEIVE EQUALIZER REGISTER 1 AND REGISTER 2
RX_EQ[X]: High Speed (TMDS) Input X Equalization Level
Select Bit
Table 19. RX_EQ[X] Description
RX_EQ[X]
Description
0
Low equalization (6 dB)
1
High equalization (12 dB)
Table 20. RX_EQ[X] Mapping
RX_EQ[X]
Corresponding Input TMDS Channel
Bit 0
B0
Bit 1
B1
Bit 2
B2
Bit 3
B3
Bit 4
A0
Bit 5
A1
Bit 6
A2
Bit 7
A3
Bit 8
C3
Bit 9
C2
Bit 10
C1
Bit 11
C0
Bit 12
D3
Bit 13
D2
Bit 14
D1
Bit 15
D0
TRANSMITTER SETTINGS REGISTER
TX_PE[1:0]: High Speed (TMDS) Output Pre-Emphasis
Level Select Bus (For All TMDS Channels)
Table 21. TX_PE[1:0] Description
TX_PE[1:0]
Description
00
No pre-emphasis (0 dB)
01
Low pre-emphasis (2 dB)
10
Medium pre-emphasis (4 dB)
11
High pre-emphasis (6 dB)
TX_PTO: High Speed (TMDS) Output Termination On/Off
Select Bit (For All Channels)
Table 22. TX_PTO Description
TX_PTO
Description
0
Output termination off
1
Output termination on
TX_OCL:High Speed (TMDS) Output Current Level Select
Bit (For All Channels)
Table 23. TX_OCL Description
TX_OCL
Description
0
Output current set to 10 mA
1
Output current set to 20 mA



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