ADM1063ASU datasheet(32/36 Pages) AD

32 / 36 page

ADM1063

Rev. 0 | Page 32 of 36

SLAVE

ADDRESS

SW A

COMMAND 0xFD

(BLOCK READ)

SLAVE

ADDRESS

BYTE

COUNT

910

DATA

Figure 49. Block Read from EEPROM or RAM

Error Correction

The ADM1063 provides the option of issuing a packet error

correction (PEC) byte after a write to RAM, a write to EEPROM,

a block write to RAM/EEPROM, or a block read from RAM/

EEPROM. This enables the user to verify that the data received

by or sent from the ADM1063 is correct. The PEC byte is an

optional byte sent after that last data byte has been written to or

read from the ADM1063. The protocol is as follows:

The ADM1063 issues a PEC byte to the master. The master

checks the PEC byte and issues another block read if the

PEC byte is incorrect.

A no acknowledge (NACK) is generated after the PEC byte

to signal the end of the read.

Note that the PEC byte is calculated using CRC-8. The frame

check sequence (FCS) conforms to CRC-8 by the polynomial

(x) = x8 + x2 + x1 + 1

See the SMBus 1.1 specification for details.

An example of a block read with the optional PEC byte is shown

in Figure 50.

SLAVE

ADDRESS

SW A

COMMAND 0xFD

(BLOCK READ)

SLAVE

ADDRESS

BYTE

COUNT

910

DATA

PEC

Figure 50. Block Read from EEPROM or RAM with PEC

ADM1063ASU Datasheet(PDF) 32 Page - Analog Devices

ADM1063ASU Datasheet(HTML) 32 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

Datasheet Download

Link URL