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ADP3196 Datasheet(PDF) 1 Page - Analog Devices

Part # ADP3196
Description  6-Bit Programmable 2- to 4-Phase Synchronous Buck Controller
PDF  20 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADP3196 Datasheet(HTML) 1 Page - Analog Devices

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6-Bit Programmable 2- to 4-Phase
Synchronous Buck Controller
ADP3196
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
FEATURES
Selectable 2-, 3-, or 4-phase operation at up to 1 MHz
per phase
±10 mV worst-case differential sensing error over
temperature
Logic-level PWM outputs for interface to external
high power drivers
Enhanced PWM flex mode for excellent load transient
performance
Active current balancing between all output phases
Built-in power-good/crowbar blanking supports on-the-fly
VID code changes
Digitally programmable 0.3750 V to 1.55 V output
Programmable short-circuit protection with programmable
latch-off delay
APPLICATIONS
Desktop PC power supplies for next generation
AMD processors
VRM modules
GENERAL DESCRIPTION
The ADP31961 is a highly efficient multiphase synchronous
buck switching regulator controller optimized for converting a
12 V main supply into the core supply voltage required by high
performance Advanced Micro Devices, Inc. (AMD) processors.
It uses an internal 6-bit DAC to read a voltage identification
(VID) code directly from the processor, which is used to set the
output voltage between 0.3750 V and 1.55 V.
This device uses a multimode PWM architecture to drive the
logic-level outputs at a programmable switching frequency that
can be optimized for VR size and efficiency. The phase
relationship of the output signals can be programmed to provide
2-, 3-, or 4-phase operation, allowing for the construction of up to
four complementary buck switching stages.
The ADP3196 supports a programmable slope function to
adjust the output voltage as a function of the load current so
that it is always optimally positioned for a system transient. This
can be disabled by connecting Pin LLSET to Pin CSREF.
1Protected by U.S. Patent Number 6,683,441; others patents pending.
FUNCTIONAL BLOCK DIAGRAM
VCC
PRECISION
REFERENCE
DELAY
–
+
GND
ADP3196
EN
DELAY
ILIMIT
PWRGD
RAMPADJ
RT
PWM2
PWM3
PWM4
SW3
SW2
SW1
CSREF
CSCOMP
SW4
CSSUM
FB
PWM1
VID5 VID4 VID3
VID2
VID0
VID1
COMP
FBRTN
VID DAC
–
+
800mV
–
+
CSREF
1.8V
CURRENT
MEASUREMENT
AND LIMIT
CROWBAR
CURRENT
LIMIT
+
–
CMP
+
–
CMP
+
–
CMP
+
–
+
–
CMP
CURRENT
BALANCING
CIRCUIT
2-/3-/4-PHASE
DRIVER LOGIC
EN
SET
RESET
RESET
RESET
RESET
OD
SS
–
+
IREF
THERMAL
THROTTLING
CONTROL
TTSENSE
VRMHOT
VRM_OFF
LLSET
UVLO
SHUTDOWN
SHUNT
REGULATOR
IMON
–
+
DAC – 250mV
OSCILLATOR
SOFT START
CONTROL
13
12
31
18
1
2
10
9
11
8
7
5
20
3
39
35
34
38
36
37
6
23
16
15
29
28
27
19
17
4
24
22
25
30
14
21
Figure 1. Functional Block Diagram
The ADP3196 also provides accurate and reliable short-circuit
protection, adjustable current limiting, and a delayed power-
good output that accommodates on-the-fly output voltage
changes requested by the CPU. The ADP3196 has a built-in
shunt regulator that allows the part to be connected to the 12 V
system supply through a series resistor.
The ADP3196 is specified over the extended commercial
temperature range of 0°C to +85°C and is available in a
40-lead LFCSP.


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