S29CD032J datasheet(34/76 Pages) SPANSION

34 / 76 page

S29CD-J & S29CL-J Flash Family

S29CD-J_CL-J_00_B1 September 27, 2006

Data

Sheet

(Pre limin ar y)

operation and DQ7 has valid data, the data outputs on DQ6-DQ0 may be still invalid. Valid data on DQ7-D00

appears on successive read cycles.

See the following for more information: Table 8.9, Write Operation Status on page 36 shows the outputs for

Data# Polling on DQ7. Figure 8.7, Data# Polling Algorithm, on page 32 shows the Data# Polling timing

diagram.

Figure 8.7 Data# Polling Algorithm

Notes

1. VA = Valid address for programming. During a sector erase operation, a valid address is an address within any sector selected for

erasure. During chip erase, a valid address is any non-protected sector address.

2. DQ7 should be rechecked even if DQ5 = 1 because DQ7 may change simultaneously with DQ5

8.8.2

DQ6: Toggle Bit I

Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete,

or whether the device has entered the Erase Suspend mode.

Toggle Bit I may be read at any address in the same bank, and is valid after the rising edge of the final WE#

pulse in the command sequence (prior to the program or erase operation), and during the sector erase time-

out.

DQ7 = Data?

Yes

DQ5 = 1?

Yes

FAIL

PASS

Read DQ7–DQ0

Addr = VA

Read DQ7–DQ0

Addr = VA

DQ7 = Data?

START

S29CD032J Datasheet(PDF) 34 Page - SPANSION