S29CD032J datasheet(37/76 Pages) SPANSION

37 / 76 page

September 27, 2006 S29CD-J_CL-J_00_B1

S29CD-J & S29CL-J Flash Family

Da ta

Shee t

(Prelim i nar y )

Figure 8.8 Toggle Bit Algorithm

Notes

1. Read toggle bit with two immediately consecutive reads to determine whether or not it is toggling.

2. Recheck toggle bit because it may stop toggling as DQ5 changes to 1.

8.8.5

DQ5: Exceeded Timing Limits

DQ5 indicates whether the program or erase time has exceeded a specified internal pulse count limit. Under

these conditions DQ5 produces a 1. This is a failure condition that indicates the program or erase cycle was

not successfully completed.

The DQ5 failure condition may appear if the system tries to program a 1 to a location that is previously

programmed to 0. Only an erase operation can change a 0 back to a 1. Under this condition, the device halts

the operation, and when the operation has exceeded the timing limits, DQ5 produces a 1.

Under both these conditions, the system issues the reset command to return the device to reading array data.

8.8.6

DQ3: Sector Erase Timer

After writing a sector erase command sequence, the system may read DQ3 to determine whether or not

erasure has begun. (The sector erase timer does not apply to the chip erase command.) If additional sectors

START

Yes

DQ5 = 1?

Yes

DQ6 = Toggle?

Read Byte

(DQ0-DQ7)

Address = VA

DQ6 = Toggle?

Read Byte Twice

(DQ?0-DQ7)

Adrdess = VA

Read Byte

(DQ0-DQ7)

Address = VA

FAIL

PASS

(Note 1)

(Notes 1, 2)

S29CD032J Datasheet(PDF) 37 Page - SPANSION