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ADS5547 Datasheet(PDF) 18 Page - Texas Instruments

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Part # ADS5547
Description  14-BIT, 210 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS
PDF  50 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

ADS5547 Datasheet(HTML) 18 Page - Texas Instruments

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ADS5547
SLWS192 – NOVEMBER 2006
Table 8. Serial Interface Register Map (continued)
REGISTER ADDRESS
REGISTER DATA
DESCRIPTION
A7
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
<CLKOUT POSN CMOS> – Output clock falling edge programmability in CMOS mode (2)
0
1
1
0
0
0
1
0
0
0
0
0
0
0
0
1
Default position
0
1
1
0
0
0
1
0
0
0
0
0
1
0
0
1
CLKOUT falling edge later by (1/12)Ts
0
1
1
0
0
0
1
0
0
0
0
1
0
0
0
1
CLKOUT falling edge later by (3/12)Ts
0
1
1
0
0
0
1
0
0
0
0
1
1
0
0
1
CLKOUT falling edge later by (2/12)Ts
<CLKOUT POSN LVDS> – Output clock rising edge programmability in LVDS mode (2)
0
1
1
0
0
0
1
0
0
0
0
0
0
0
0
1
Default position
0
1
1
0
0
0
1
0
0
0
0
0
0
0
1
1
CLKOUT rising edge earlier by (1/12)Ts
CLKOUT rising edge aligned with data
0
1
1
0
0
0
1
0
0
0
0
0
0
1
0
1
transition
CLKOUT rising edge aligned with data
0
1
1
0
0
0
1
0
0
0
0
0
0
1
1
1
transition
<CLKOUT POSN LVDS> – Output clock falling edge programmability in LVDS mode (2)
0
1
1
0
0
0
1
0
0
0
0
0
0
0
0
1
Default position
0
1
1
0
0
0
1
0
0
0
0
0
1
0
0
1
CLKOUT falling edge earlier by (1/12)Ts
CLKOUT falling edge aligned with data
0
1
1
0
0
0
1
0
0
0
0
1
0
0
0
1
transition
CLKOUT falling edge aligned with data
0
1
1
0
0
0
1
0
0
0
0
1
1
0
0
1
transition
<LOW SPEED> – For low sampling frequency operation
DEFAULT SPEED mode - for 50 < Fs
≤ 210
0
1
1
0
0
0
1
1
0
0
0
0
0
0
0
0
MSPS
0
1
1
0
0
0
1
1
0
0
0
1
0
0
0
0
LOW SPEED mode - for 1 < Fs
≤ 50 MSPS
(2)
Ts = 1/Sampling Frequency
18
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