Integrated

Circuit

Systems, Inc.

ICS954309

1044A—02/20/07

Pin Configuration

Recommended Application:

Supports CK410M with additional SRC clock support

Output Features:

•

2 - 0.7V current-mode differential CPU pairs

•

9 - 0.7V current-mode differential SRC pair for SATA and

PCI Express*

•

1 - 0.7V current-mode differential CPU/SRC selectable

pair

•

4 - PCI (33MHz)

•

1 - PCICLK_F, (33MHz) free-running

•

1 - USB, 48MHz

•

1 - DOT, 96MHz, 0.7V current differential pair

•

1 - REF, double-strength 14.318MHz

Programmable Timing Control Hub™ for Mobile P4™ Systems

Key Specifications:

•

CPU outputs cycle-cycle jitter < 85ps

•

SRC outputs cycle-cycle jitter < 125ps

•

PCI outputs cycle-cycle jitter < 500ps

•

+/- 100ppm frequency accuracy on USB

Features/Benefits:

•

+/- 300 ppm accuracy clocks for Serial-ATA and PCI

Express and CPU clocks

•

Supports spread spectrum modulation, 0 to -0.5%

down spread for CPU, SRC and PCI clocks

•

Supports CPU clocks up to 400MHz

•

Uses external 14.318MHz crystal, external crystal load

caps are required for frequency tuning

•

Supports undriven differential CPU, SRC pair in PD#

for power management.

64-pin MLF

*Other names and brands may be claimed as the property of others.

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49

GND48

148 VDDPCI

SRCT0

247 REF

SRCC0

346 GNDREF

OE0#

445 X1

SRCT1

544 X2

SRCC1

643 VDDREF

OEA#

742 SMBDAT

SRCT2

8

41 SMBCLK

SRCC2

9

40 CPU_STOP#

VDDSRC 10

39 CPUCLKT0

GNDSRC 11

38 CPUCLKC0

OE3# 12

37 GNDCPU

SRCT3 13

36 VDDCPU

SRCC3 14

35 CPUCLKT1

OE6# 15

34 CPUCLKC1

PCI_STOP# 16

33 IREF

17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

ICS954309

Functionality

FS_C

1

FS_B

2 FS_A2

CPU

MHz

SRC

MHz

PCI

MHz

REF

MHz

USB

MHz

DOT

MHz

0

0

0

266.66

100.00

33.33 14.318

48.00

96.00

0

0

1

133.33

100.00

33.33 14.318

48.00

96.00

0

1

0

200.00

100.00

33.33 14.318

48.00

96.00

0

1

1

166.66

100.00

33.33 14.318

48.00

96.00

1

0

0

333.33

100.00

33.33 14.318

48.00

96.00

1

0

1

100.00

100.00

33.33 14.318

48.00

96.00

1

1

0

400.00

100.00

33.33 14.318

48.00

96.00

1

1

1

14.318

48.00

96.00

1. FS_C is a three-level input. Please see VIL_FS and VIH_FS specifications in

the Input/Supply/Common Output Parameters Table for correct values.

Also refer to the Test Clarification Table.

2. FS_B and FS_A are low-threshold inputs. Please see the VIL_FS and VIH_FS

specifications in the Input/Supply/Common Output Parameters Table for correct values.

RESERVED