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8701 Datasheet(PDF) 3 Page - Renesas Technology Corp |
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8701 Datasheet(HTML) 3 Page - Renesas Technology Corp |
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3 / 14 page ![]() REVISION F 1/21/15 8701 DATA SHEET 3 LOW SKEW, ÷1, ÷2 LVCMOS/LVTTL CLOCK GENERATOR TABLE 2. PIN CHARACTERISTICS TABLE 3. FUNCTION TABLE Symbol Parameter Test Conditions Minimum Typical Maximum Units C IN Input Capacitance 4 pF R PULLUP Input Pullup Resistor 51 k Ω R PULLDOWN Input Pulldown Resistor 51 k Ω C PD Power Dissipation Capacitance (per output) V DD, VDDO = 3.465V 15 pF R OUT Output Impedance 7 Ω Inputs Outputs nMR/OE BANK_EN1 BANK_EN0 DIV_SELx QA0:QA4 QB0:QB4 QC0:QC4 QD0:QD4 Qx Frequency 0 X X X Hi Z Hi Z Hi Z Hi Z zero 1 0 0 0 Active Hi Z Hi Z Hi Z fIN/2 1 1 0 0 Active Active Hi Z Hi Z fIN/2 1 0 1 0 Active Active Active Hi Z fIN/2 1 1 1 0 Active Active Active Active fIN/2 1 0 0 1 Active Hi Z Hi Z Hi Z fIN 1 1 0 1 Active Active Hi Z Hi Z fIN 1 0 1 1 Active Active Active Hi Z fIN 1 1 1 1 Active Active Active Active fIN |
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