ADT7475 datasheet(30/68 Pages) AD

30 / 68 page

ADT7475

Rev. A | Page 30 of 68

Fan Spin-Up

The ADT7475 has a unique fan spin-up function. It spins the fan

at 100% PWM duty cycle until two TACH pulses are detected on

the TACH input. Once two TACH pulses have been detected, the

PWM duty cycle goes to the expected running value, for example,

33%. The advantage is that fans have different spin-up charac-

teristics and take different times to overcome inertia. The

ADT7475 runs the fans just fast enough to overcome inertia

and is quieter on spin-up than fans programmed to spin up for

a given spin-up time.

Fan Startup Timeout

To prevent the generation of false interrupts as a fan spins up

(because it is below running speed), the ADT7475 includes a

fan startup timeout function. During this time, the ADT7475

looks for two TACH pulses. If two TACH pulses are not

detected, an interrupt is generated. Using Configuration

changed (see the Disabling Fan Startup Timeout section).

PWM1, PWM2, PWM3 Configuration Registers (0x5C,

0x5D, and 0x5E)

Bits [2:0] SPIN, startup timeout for PWM1 = 0x5C, PWM2 =

0x5D, and PWM3 = 0x5E.

000 = No startup timeout

001 = 100 ms

010 = 250 ms default

011 = 400 ms

100 = 667 ms

101 = 1 sec

110 = 2 sec

111 = 4 sec

Disabling Fan Startup Timeout

Although fan startup makes fan spin-ups much quieter than

fixed-time spin-ups, the option exists to use fixed spin-up

times. Setting Bit 5 (FSPDIS) to 1 in Configuration Register 1

(0x40) disables the spin-up for two TACH pulses. Instead, the

fan spins up for the fixed time as selected in Register 0x5C to

PWM Logic State

The PWM outputs can be programmed high for 100% duty

cycle (noninverted) or low for 100% duty cycle (inverted).

PWM1 Configuration Register (0x5C)

Bit 4 INV

0 = Logic high for 100% PWM duty cycle.

1 = Logic low for 100% PWM duty cycle.

PWM2 Configuration Register (0x5D)

Bit 4 INV

0 = Logic high for 100% PWM duty cycle.

1 = Logic low for 100% PWM duty cycle.

PWM3 Configuration Register (0x5E)

Bit 4 INV

0 = Logic high for 100% PWM duty cycle.

1 = Logic low for 100% PWM duty cycle.

Low Frequency Mode PWM Drive Frequency

The PWM drive frequency can be adjusted for the application.

for PWM1 to PWM3, respectively. In high frequency mode, the

PWM drive frequency is always 22.5 kHz.

High Frequency Mode PWM Drive

Setting Bit 3 of Register 0x5F, Register 0x60, and Register 0x61

enables high frequency mode for Fan 1, Fan 2, and Fan 3,

respectively.

PWM Frequency Registers (0x5F to 0x61)

Bits [2:0] FREQ

000 = 11.0 Hz

001 = 14.7 Hz

010 = 22.1 Hz

011 = 29.4 Hz

100 = 35.3 Hz default

101 = 44.1 Hz

110 = 58.8 Hz

111 = 88.2 Hz

Fan Speed Control

The ADT7475 controls fan speed using automatic mode and

manual mode as follows:

•

In automatic fan speed control mode, fan speed is

automatically varied with temperature and without CPU

intervention, once initial parameters are set up. The

advantage of this is, if the system hangs, the user is

guaranteed the system is protected from overheating. For

more information and how to program the automatic fan

speed control loop, see the Programming the Automatic

Fan Speed Control Loop section.

•

In manual fan speed control mode, the ADT7475 allows

the duty cycle of any PWM output to be manually

adjusted. This can be useful if the user wants to change fan

speed at the software level or adjust PWM duty cycle

output for test purposes. Bits [7:5] of Register 0x5C to

of each PWM output.

ADT7475 Datasheet(PDF) 30 Page - Analog Devices

ADT7475 Datasheet(HTML) 30 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

Datasheet Download

Link URL