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ADUC7021 Datasheet(PDF) 64 Page - Analog Devices

Part # ADUC7021
Description  Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
PDF  92 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADUC7021 Datasheet(HTML) 64 Page - Analog Devices

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ADuC7019/20/21/22/24/25/26/27
Rev. A | Page 64 of 92
COMCON1 Register
Name
Address
Default Value
Access
COMCON1
0xFFFF0710
0x00
R/W
COMCON1 is the modem control register.
Table 51. COMCON1 MMR Bit Descriptions
Bit
Name
Description
7:5
Reserved.
4
LOOPBACK
Loop Back. Set by user to enable loop
back mode. In loop back mode, the
SOUT is forced high. The modem signals
are also directly connected to the status
inputs (RTS to CTS, DTR to DSR, OUT1 to
RI, and OUT2 to DCD). Cleared by user to
be in normal mode.
3
PEN
Parity Enable Bit. Set by user to transmit
and check the parity bit. Cleared by user
for no parity transmission or checking.
2
STOP
Stop Bit. Set by user to transmit 1.5 stop
bits if the word length is 5 bits or 2 stop
bits if the word length is 6 bits, 7 bits, or
8 bits. The receiver checks the first stop
bit only, regardless of the number of
stop bits selected. Cleared by user to
generate 1 stop bit in the transmitted
data.
1
RTS
Request To Send. Set by user to force the
RTS output to 0. Cleared by user to force
the RTS output to 1.
0
DTR
Data Terminal Ready. Set by user to force
the DTR output to 0. Cleared by user to
force the DTR output to 1.
COMSTA0 Register
Name
Address
Default Value
Access
COMSTA0
0xFFFF0714
0x60
R
COMSTA0 is the line status register.
Table 52. COMSTA0 MMR Bit Descriptions
Bit
Name
Description
7
Reserved.
6
TEMT
COMTX Empty Status Bit. Set automatically if
COMTX is empty. Cleared automatically when
writing to COMTX.
5
THRE
COMTX and COMRX Empty. Set automatically if
COMTX and COMRX are empty. Cleared automati-
cally when one of the register receives data.
4
BI
Break Error. Set when SIN is held low for more than
the maximum word length. Cleared automatically.
3
FE
Framing Error. Set when invalid stop bit. Cleared
automatically.
2
PE
Parity Error. Set when a parity error occurs.
Cleared automatically.
1
OE
Overrun Error. Set automatically if data is over-
written before being read. Cleared automatically.
0
DR
Data Ready. Set automatically when COMRX is
full. Cleared by reading COMRX.
COMSTA1 Register
Name
Address
Default Value
Access
COMSTA1
0xFFFF0718
0x00
R
COMSTA1 is a modem status register.
Table 53. COMSTA1 MMR Bit Descriptions
Bit
Name
Description
7
DCD
Data Carrier Eetect.
6
RI
Ring Indicator.
5
DSR
Data Set Ready.
4
CTS
Clear To Send.
3
DDCD
Delta DCD. Set automatically if DCD changed
state since COMSTA1 last read. Cleared automati-
cally by reading COMSTA1.
2
TERI
Trailing Edge RI. Set if NRI changed from 0 to 1
since COMSTA1 last read. Cleared automatically
by reading COMSTA1.
1
DDSR
Delta DSR. Set automatically if DSR changed state
since COMSTA1 last read. Cleared automatically
by reading COMSTA1.
0
DCTS
Delta CTS. Set automatically if CTS changed state
since COMSTA1 last read. Cleared automatically
by reading COMSTA1.
COMSCR Register
Name
Address
Default Value
Access
COMSCR
0xFFFF071C
0x00
R/W
COMSCR is an 8-bit scratch register used for temporary
storage. It is also used in network addressable UART mode.
COMDIV2 Register
Name
Address
Default Value
Access
COMDIV2
0xFFFF072C
0x0000
R/W
COMDIV2 is a 16-bit fractional baud divide register.
Table 54. COMDIV2 MMR Bit Descriptions
Bit
Name
Description
15
FBEN
Fractional Baud Rate Generator Enable Bit.
Set by user to enable the fractional baud
rate generator. Cleared by user to generate
baud rate using the standard 450 UART
baud rate generator.
14:13
Reserved.
12:11
FBM[1-0]
M if FBM = 0, M = 4.
10:0
FBN[10-0]
N.



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