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P87LPC778 Datasheet(PDF) 44 Page - NXP Semiconductors

Part # P87LPC778
Description  CMOS single-chip 8-bit 80C51 microcontroller 128-byte data RAM, 8 kB OTP
PDF  79 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

P87LPC778 Datasheet(HTML) 44 Page - NXP Semiconductors

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Philips Semiconductors
P87LPC778
CMOS single-chip 8-bit microcontroller
Product data
Rev. 01 — 31 March 2004
44 of 79
9397 750 12378
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Some chip functions continue to operate and draw power during Power-down mode,
increasing the total power used during Power-down. These include the Brownout
Detect, Watchdog Timer, and Comparators.
8.12.3
Low voltage EPROM operation
The EPROM array contains some analog circuits that are not required when VDD is
less than 4 V, but are required for a VDD greater than 4 V. The LPEP bit (AUXR.4),
when set by software, will Power-down these analog circuits resulting in a reduced
supply current. LPEP is cleared only by Power-on reset, so it may be set ONLY for
applications that always operate with VDD less than 4 V.
Table 40:
Interrupt sources
Wake-up Source
Conditions
External Interrupt 0 or 1
The corresponding interrupt must be enabled.
Keyboard Interrupt
The keyboard interrupt feature must be enabled and properly
set up. The corresponding interrupt must be enabled.
Comparator 1 or 2
The comparator(s) must be enabled and properly set up. The
corresponding interrupt must be enabled.
Watchdog Timer Reset
The Watchdog timer must be enabled via the WDTE bit in the
UCFG1 EPROM configuration byte.
Watchdog Timer Interrupt
The WDTE bit in the UCFG1 EPROM configuration byte must
not be set. The corresponding interrupt must be enabled.
Brownout Detect Reset
The BOD bit in AUXR1 must not be set (brownout detect not
disabled). The BOI bit in AUXR1 must not be set (brownout
interrupt disabled).
Brownout Detect Interrupt
The BOD bit in AUXR1 must not be set (brownout detect not
disabled). The BOI bit in AUXR1 must be set (brownout interrupt
enabled). The corresponding interrupt must be enabled.
Reset Input
The external reset input must be enabled.
A/D Converter
Must use internal RC clock (RCCLK = 1) for A/D converter to
work in Power-down mode. The A/D must be enabled and
properly set up. The corresponding interrupt must be enabled.
Table 41:
PCON - Power control register (address 87H) bit allocation
Not bit addressable; Reset value: 30H for a Power-on reset; 20H for a Brownout reset; 00H for
other reset sources.
Bit
7
6
5
4
3
2
1
0
Symbol
SMOD1
SMOD0
BOF
POF
GF1
GF0
PD
IDL
Table 42:
PCON - Power control register (address 87H) bit description
Bit
Symbol
Description
7
SMOD1
When set, this bit doubles the UART baud rate for modes 1, 2, and
3.
6
SMOD0
This bit selects the function of bit 7 of the SCON SFR. When 0,
SCON.7 is the SM0 bit. When 1, SCON.7 is the FE (Framing Error)
flag. See Tables 48 and 49 for additional information.
5
BOF
Brown Out Flag. Set automatically when a brownout reset or
interrupt has occurred. Also set at Power-on. Cleared by software.
Refer to Section 8.11 “Power monitoring functions” on page 42 for
additional information.



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