AD9705-EB datasheet(37/52 Pages) AD

37 / 52 page

AD9704/AD9705/AD9706/AD9707

Rev. 0 | Page 37 of 52

Power dissipation is directly proportional to the analog supply

current, IAVDD, and the digital supply current, IDVDD. IAVDD is equal

to a fixed current plus IOUTFS, as shown in Figure 82. IDVDD is

proportional to fCLOCK and increases with increasing analog

output frequencies. Figure 84 shows IDVDD as a function of full-

scale sine wave output ratios (fOUT/fCLOCK) for various update rates

with DVDD = 3.3 V. ICLKVDD is directly proportional to fCLOCK

and is higher for differential clock operation than for single-

ended operation, as shown in Figure 86. This difference in clock

current is due primarily to the differential clock receiver, which is

disabled in single-ended clock mode.

12345

IOUTFS (mA)

Figure 82. IAVDD vs. IOUTFS @ AVDD = 3.3 V

1.00

1.25

1.50

1.75

2.00

IOUTFS (mA)

Figure 83. IAVDD vs. IOUTFS @ AVDD = 1.8 V

0.01

0.1

fOUT/fCLOCK

175MSPS

125MSPS

75MSPS

10MSPS

25MSPS

Figure 84. IDVDD vs. fOUT/fCLOCK Ratio @ DVDD = 3.3 V

2.5

0.01

0.1

fOUT/fCLOCK

0.5

1.0

1.5

2.0

2.5

80MSPS

50MSPS

25MSPS

10MSPS

Figure 85. IDVDD vs. fOUT/fCLOCK Ratio @ DVDD = 1.8 V

100

150

200

fCLOCK (MSPS)

DIFF

Figure 86. ICLKVDD vs. fCLOCK @ CLKVDD = 3.3 V

AD9705-EB Datasheet(PDF) 37 Page - Analog Devices

AD9705-EB Datasheet(HTML) 37 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

Datasheet Download

Link URL