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LPC804 Datasheet(PDF) 27 Page - NXP Semiconductors |
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LPC804 Datasheet(HTML) 27 Page - NXP Semiconductors |
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27 / 89 page ![]() LPC804 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2023. All rights reserved. Product data sheet Rev. 2.1 — 25 July 2023 27 of 87 NXP Semiconductors LPC804 32-bit Arm Cortex-M0+ microcontroller The ADC includes a hardware threshold compare function with zero-crossing detection. Remark: For best performance, select VREFP and VREFN at the same voltage levels as VDD and VSS. When selecting VREFP and VREFN different from VDD and VSS, ensure that the voltage midpoints are the same: (VREFP-VREFN)/2 + VREFN = VDD/2 9.22.1 Features • 12-bit successive approximation analog to digital converter. • 12-bit conversion rate of up to 480 KSamples/s. • Two configurable conversion sequences with independent triggers. • Optional automatic high/low threshold comparison and zero-crossing detection. • Power-down mode and low-power operating mode. • Measurement range VREFN to VREFP (not to exceed VDD voltage level). • Burst conversion mode for single or multiple inputs. 9.23 Digital-to-Analog Converter (DAC) The DAC supports a resolution of 10 bits. Conversions can be triggered by an external pin input or an internal timer. The DAC includes an optional automatic hardware shut-off feature, which forces the DAC output voltage to zero while a HIGH level on the external DAC_SHUTOFF pin is detected. 9.23.1 Features • 10-bit digital-to-analog converter. • Internal timer or pin external trigger for staged, jitter-free DAC conversion sequencing. • Automatic hardware shut-off triggered by an external pin. |
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