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UPD17708 Datasheet(PDF) 317 Page - Renesas Technology Corp |
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UPD17708 Datasheet(HTML) 317 Page - Renesas Technology Corp |
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317 / 358 page  315 µPD17704, 17705, 17707, 17708, 17709 Figure 21-6. Power-ON Reset and Supply Voltage VDD (a) Normal operation (including halt status) VDD CE Power-ON clear signal XOUT 5 V 3.5 V 0 V H L H L H L Power-ON clear voltage Normal operation Device operation stops Halt status 50 ms Power-ON clear released Oscillation starts Program starts from address 0 (c) If supply voltage VDD rises from 0 V VDD CE Power ON clear signal XOUT 5 V 3.5 V 2.2 V 0 V H L H L H L Power-ON clear voltage Normal operation STOP s instruction Clock stop Device operation stops Halt status 50 ms Power-ON clear released Oscillation starts Program starts from address 0 (b) In clock stop status VDD CE Power-ON clear signal XOUT 5 V 3.5 V 0 V H L H L H L Power-ON clear voltage Device operation stops Halt status 50 ms Power-ON clear released Oscillation starts Program starts from address 0 |
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