UPD17708 datasheet(335/358 Pages) RENESAS

335 / 358 page

333

µPD17704, 17705, 17707, 17708, 17709

22.2 Legend

: Address register

ASR

: Address stack register indicated by stack pointer

addr

: Program memory address (low-order 11 bits)

BANK

: Bank register

CMP

: Compare flag

: Carry flag

DBF

: Data buffer

entry

: Program memory address (bits 10 through 8, bits 3 through 0)

entryH

: Program memory address (bits 10 through 8)

entryL

: Program memory address (bits 3 through 0)

: Halt release condition

INTEF

: Interrupt enable flag

INTR

: Register automatically saved to stack when interrupt occurs

INTSK

: Interrupt stack register

: Index register

: Data memory row address pointer

MPE

: Memory pointer enable flag

: Data memory address indicated by mR, mC

: Data memory row address (high-order)

: Data memory column address (low-order)

: Bit position (4 bits)

: Immediate data (4 bits)

PAGE

: Page (bits 12 and 11 of program counter)

: Program counter

: Peripheral address

: Peripheral address (high-order 3 bits)

: Peripheral address (low-order 4 bits)

: General register column address

: Register file address

rfR

: Register file row address (high-order 3 bits)

rfC

: Register file column address (low-order 4 bits)

SGR

: Segment register (bit 13 of program counter)

: Stack pointer

: Stop release condition

: Window register

(x)

: Contents addressed by x

UPD17708 Datasheet(PDF) 335 Page - Renesas Technology Corp

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