UPD17708 datasheet(119/358 Pages) RENESAS

119 / 358 page

117

µPD17704, 17705, 17707, 17708, 17709

12. INTERRUPT

12.1 Outline of Interrupt Block

Figure 12-1 outlines the interrupt block.

As shown in the figure, the interrupt block temporarily stops the currently executed program and branches

execution to a vector address in response to an interrupt request output by a peripheral hardware unit.

The interrupt block consists of an “interrupt request servicing block” corresponding to each peripheral

hardware unit, “interrupt enable flip-flop” that enables all interrupts, “stack pointer” that is controlled when an

interrupt is accepted, “address stack registers”, “program counter”, and “interrupt stack”.

The “interrupt control block” of each peripheral hardware unit consists of an “interrupt request flag (IRQ

×××)”

that detects the corresponding interrupt request, “interrupt enable flag (IP

×××)” that enables the interrupt, and

“vector address generator (VAG)” that specifies a vector address when the interrupt is accepted.

The

µPD17709 has the following 12 types of maskable interrupts.

•

CE pin falling edge interrupt

•

INT0 through INT4 interrupts

•

Timer 0 through timer 3 interrupts

•

Serial interface 0 and serial interface 1 interrupts

When an interrupt is accepted, execution branches to a predetermined address, and the interrupt is serviced.

UPD17708 Datasheet(PDF) 119 Page - Renesas Technology Corp