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UPD17708 Datasheet(PDF) 145 Page - Renesas Technology Corp

Part # UPD17708
Description  MOS INTEGRATED CIRCUIT
PDF  358 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD17708 Datasheet(HTML) 145 Page - Renesas Technology Corp

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µPD17704, 17705, 17707, 17708, 17709
12.7 Operations after Interrupt Has Been Accepted
When an interrupt is accepted, the following operations are sequentially performed automatically.
(1) The interrupt enable flip-flop and the interrupt request flag corresponding to the accepted interrupt
request are reset to “0”. As a result, the other interrupts are disabled.
(2) The contents of the stack pointer are decremented by one.
(3) The contents of the program counter are saved to an address stack register specified by the stack pointer.
At this time, the contents of the program counter are the program memory address after the address at
which the interrupt has been accepted.
For example, if a branch instruction is executed when the interrupt has been accepted, the contents of
the program counter are the branch destination address. If a subroutine call instruction is executed, the
contents of the program counter are the call destination address. If the skip condition of a skip instruction
is satisfied, the next instruction is executed as NOP and then the interrupt is accepted. Consequently,
the contents of the program counter are the address after that of the instruction that is skipped.
(4) The contents of the system registers (except the address register) are saved to the interrupt stack.
(5) The contents of the vector address generator corresponding to the interrupt that has been accepted are
transferred to the program counter. In other words, execution branches to the interrupt routine.
The operations (1) through (5) above require the time of one special instruction cycle (1.78
µs) in which normal
instruction execution is not performed.
This instruction cycle is called an “interrupt cycle”.
In other words, the time of one instruction cycle (1.78
µs) is required after an interrupt has been accepted
until execution branches to the corresponding vector address.
12.8 Returning from Interrupt Routine
The interrupt return (RETI) instruction is used to return from an interrupt routine to the processing during
which an interrupt was accepted.
When the RETI instruction is executed, the following operations are sequentially performed automatically.
(1) The contents of an address stack register specified by the stack pointer are restored to the program
counter.
(2) The contents of the interrupt stack are restored to the system registers.
(3) The contents of the stack pointer are incremented by one.
The operations (1) through (3) above require one instruction cycle (1.78
µs) in which the RETI instruction
is executed.
The only difference between the RETI instruction and the RET and RETSK instructions, which are subroutine
return instructions, is the restoration of the bank register and index register in step (2) above.



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