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UPD17708 Datasheet(PDF) 199 Page - Renesas Technology Corp |
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UPD17708 Datasheet(HTML) 199 Page - Renesas Technology Corp |
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199 / 358 page  197 µPD17704, 17705, 17707, 17708, 17709 Figure 14-5. Configuration of A/D Converter Mode Selection Register Notes 1. A/D conversion under execution is stopped if “0” is written to this bit. 2. A/D operation is started in the hardware mode when “1” is written to this bit. In the software mode, operation is started as soon as data has been written (by the PUT instruction) to the A/D converter reference voltage setting register (ADCR). Name Flag symbol b3 0 b2 A D C M D b1 A D C S T T b0 A D C C M P Address 25H Read/Write R/W A/D converter mode selection Power-ON reser WDT&SP reser CE reser Clock stop R:Retained 0 1 0 0 0 R VADCIN < VADCREF VADCIN > VADCREF Detects result of comparison by A/D converter 00 0 R R End of conversion Conversion in progress Software modeNote 1 Hardware modeNote 2 Detects operating status of A/D converter in hardware mode 0 1 0 0 0 0 Selects compare mode of A/D converter and starts or stops A/D converter 0 1 Fixed to “0” |
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