EP1C3 datasheet(67/104 Pages) ALTERA

67 / 104 page

Altera Corporation

3–5

January 2007

Preliminary

SignalTap II Embedded Logic Analyzer

Cyclone devices must be within the first 8 devices in a JTAG

chain. All of these devices have the same JTAG controller. If any

of the Cyclone devices are in the 9th or after they will fail

configuration. This does not affect the SignalTap® II logic

analyzer.

For more information on JTAG, see the following documents:

■

AN 39: IEEE Std. 1149.1 (JTAG) Boundary-Scan Testing in Altera Devices

■

Jam Programming & Test Language Specification

SignalTap II

Embedded Logic

Analyzer

Cyclone devices feature the SignalTap II embedded logic analyzer, which

monitors design operation over a period of time through the IEEE

Std. 1149.1 (JTAG) circuitry. A designer can analyze internal logic at speed

without bringing internal signals to the I/O pins. This feature is

particularly important for advanced packages, such as FineLine BGA

packages, because it can be difficult to add a connection to a pin during

the debugging process after a board is designed and manufactured.

Configuration

The logic, circuitry, and interconnects in the Cyclone architecture are

configured with CMOS SRAM elements. Altera FPGAs are

reconfigurable and every device is tested with a high coverage

production test program so the designer does not have to perform fault

testing and can instead focus on simulation and design verification.

Cyclone devices are configured at system power-up with data stored in

an Altera configuration device or provided by a system controller. The

Cyclone device's optimized interface allows the device to act as controller

in an active serial configuration scheme with the new low-cost serial

configuration device. Cyclone devices can be configured in under 120 ms

using serial data at 20 MHz. The serial configuration device can be

programmed via the ByteBlaster II download cable, the Altera

Programming Unit (APU), or third-party programmers.

In addition to the new low-cost serial configuration device, Altera offers

in-system programmability (ISP)-capable configuration devices that can

configure Cyclone devices via a serial data stream. The interface also

enables microprocessors to treat Cyclone devices as memory and

configure them by writing to a virtual memory location, making

reconfiguration easy. After a Cyclone device has been configured, it can

be reconfigured in-circuit by resetting the device and loading new data.

Real-time changes can be made during system operation, enabling

innovative reconfigurable computing applications.

EP1C3 Datasheet(PDF) 67 Page - Altera Corporation

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