RT5753C datasheet(21/28 Pages) RICHTEK

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RT5753A/B/C/D

DS5753A/B/C/D-03 May 2022

www.richtek.com

is a registered trademark of Richtek Technology Corporation.

In addition, the input capacitor needs to have a very low

ESR and must be rated to handle the worst-case RMS

input current of :

OUT

RMS

OUT_MAX

OUT







It is common to use the worse IRMS

≅ IOUT/2 at VIN =

2VOUT for design. Note that ripple current ratings from

capacitor manufacturers are often based on only 2000

hours of life which makes it advisable to further de-rate

the capacitor, or choose a capacitor rated at a higher

temperature than required.

Several capacitors may also be paralleled to meet size,

height and thermal requirements in the design. For low

input voltage applications, sufficient bulk input capacitance

is needed to minimize transient effects during output load

changes.

Ceramic capacitors are ideal for switching regulator

applications because of its small size, robustness and

very low ESR. However, care must be taken when these

capacitors are used at the input. A ceramic input capacitor

combined with trace or cable inductance forms a high

quality (under damped) tank circuit. If the RT5753A/B/C/

D circuit is plugged into a live supply, the input voltage

can ring to twice its nominal value, possibly exceeding

the device's rating. This situation is easily avoided by

placing the low ESR ceramic input capacitor in parallel

with a bulk capacitor with higher ESR to damp the voltage

ringing.

The input capacitor should be placed as close as possible

to the VIN pins, with a low inductance connection to the

GND of the IC. In addition to a larger bulk capacitor, a

small ceramic capacitors of 0.1

μF should be placed close

to the VIN and GND pin. This capacitor should be 0402 or

0603 in size.

Output Capacitor Selection

The RT5753A/B/C/D are optimized for ceramic output

capacitors and best performance will be obtained by using

them. The total output capacitance value is usually

determined by the desired output voltage ripple level and

transient response requirements for sag (undershoot on

load apply) and soar (overshoot on load release).

Output Ripple

The output voltage ripple at the switching frequency is a

function of the inductor current ripple going through the

output capacitor's impedance. To derive the output voltage

ripple, the output capacitor with capacitance, COUT, and

its equivalent series resistance, RESR, must be taken into

consideration. The output peak-to-peak ripple voltage

VRIPPLE, caused by the inductor current ripple

ΔIL, is

characterized by two components, which are ESR ripple

VRIPPLE(ESR) and capacitive ripple VRIPPLE(C), and can be

expressed as below :

RIPPLE

RIPPLE(ESR)

RIPPLE(C)

RIPPLE(ESR)

ESR

RIPPLE(C)

OUT

= V

= I









If ceramic capacitors are used as the output capacitors,

both the components need to be considered due to the

extremely low ESR and relatively small capacitance.

Output Transient Undershoot and Overshoot

In addition to voltage ripple at the switching frequency,

the output capacitor and its ESR also affect the voltage

sag (undershoot) and soar (overshoot) when the load steps

up and down abruptly. The ACOT® transient response is

very quick and output transients are usually small. The

following section shows how to calculate the worst-case

voltage swings in response to very fast load steps.

The output voltage transient undershoot and overshoot each

have two components : the voltage steps caused by the

output capacitor's ESR, and the voltage sag and soar due

to the finite output capacitance and the inductor current

slew rate. Use the following formula to check if the ESR

is low enough (typically not a problem with ceramic

capacitors) and the output capacitance is large enough to

prevent excessive sag and soar on very fast load step

edges, with the chosen inductor value.

The amplitude of the ESR step up or down is a function of

the load step and the ESR of the output capacitor :

VESR _STEP =

ΔIOUT x RESR

The amplitude of the capacitive sag is a function of the

load step, the output capacitor value, the inductor value,

the input-to-output voltage differential, and the maximum

duty cycle. The maximum duty cycle during a fast transient

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